driver: ad9833
This commit is contained in:
File diff suppressed because one or more lines are too long
52
firmware/func_gen_stm32f303re_nucleo/Core/Inc/spi.h
Normal file
52
firmware/func_gen_stm32f303re_nucleo/Core/Inc/spi.h
Normal file
@@ -0,0 +1,52 @@
|
||||
/* USER CODE BEGIN Header */
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/**
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||||
******************************************************************************
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* @file spi.h
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* @brief This file contains all the function prototypes for
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* the spi.c file
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******************************************************************************
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* @attention
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*
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||||
* Copyright (c) 2023 STMicroelectronics.
|
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* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
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||||
******************************************************************************
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||||
*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __SPI_H__
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#define __SPI_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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extern SPI_HandleTypeDef hspi2;
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/* USER CODE BEGIN Private defines */
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/* USER CODE END Private defines */
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void MX_SPI2_Init(void);
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/* USER CODE BEGIN Prototypes */
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/* USER CODE END Prototypes */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __SPI_H__ */
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@@ -56,7 +56,7 @@
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/*#define HAL_LPTIM_MODULE_ENABLED */
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/*#define HAL_RNG_MODULE_ENABLED */
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/*#define HAL_RTC_MODULE_ENABLED */
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/*#define HAL_SPI_MODULE_ENABLED */
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#define HAL_SPI_MODULE_ENABLED
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/*#define HAL_TIM_MODULE_ENABLED */
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#define HAL_UART_MODULE_ENABLED
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/*#define HAL_USART_MODULE_ENABLED */
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@@ -18,6 +18,7 @@
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "spi.h"
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#include "usart.h"
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#include "gpio.h"
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@@ -58,92 +59,94 @@ void SystemClock_Config(void);
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/* USER CODE END 0 */
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/**
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* @brief The application entry point.
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* @retval int
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*/
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* @brief The application entry point.
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* @retval int
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*/
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int main(void)
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{
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/* USER CODE BEGIN 1 */
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/* USER CODE END 1 */
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/* MCU Configuration--------------------------------------------------------*/
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/* MCU Configuration--------------------------------------------------------*/
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/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
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HAL_Init();
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/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
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HAL_Init();
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/* USER CODE BEGIN Init */
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/* USER CODE BEGIN Init */
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/* USER CODE END Init */
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/* USER CODE END Init */
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/* Configure the system clock */
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SystemClock_Config();
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/* Configure the system clock */
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SystemClock_Config();
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/* USER CODE BEGIN SysInit */
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/* USER CODE BEGIN SysInit */
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/* USER CODE END SysInit */
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/* USER CODE END SysInit */
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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MX_USART2_UART_Init();
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/* USER CODE BEGIN 2 */
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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MX_USART2_UART_Init();
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MX_SPI2_Init();
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/* USER CODE BEGIN 2 */
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/* USER CODE END 2 */
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/* USER CODE END 2 */
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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while (1)
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{
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/* USER CODE END WHILE */
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/* USER CODE END WHILE */
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||||
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/* USER CODE BEGIN 3 */
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||||
/* USER CODE BEGIN 3 */
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}
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/* USER CODE END 3 */
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/* USER CODE END 3 */
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}
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/**
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* @brief System Clock Configuration
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* @retval None
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*/
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* @brief System Clock Configuration
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
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RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
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RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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{
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Error_Handler();
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}
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
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RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
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RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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{
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Error_Handler();
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
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{
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Error_Handler();
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}
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
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PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
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{
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Error_Handler();
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}
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
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{
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Error_Handler();
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}
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
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PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
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{
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Error_Handler();
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}
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}
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/* USER CODE BEGIN 4 */
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@@ -151,33 +154,33 @@ void SystemClock_Config(void)
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/* USER CODE END 4 */
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/**
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* @brief This function is executed in case of error occurrence.
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* @retval None
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*/
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* @brief This function is executed in case of error occurrence.
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* @retval None
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*/
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void Error_Handler(void)
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{
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/* USER CODE BEGIN Error_Handler_Debug */
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/* USER CODE BEGIN Error_Handler_Debug */
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/* User can add his own implementation to report the HAL error return state */
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__disable_irq();
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while (1)
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{
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}
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/* USER CODE END Error_Handler_Debug */
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/* USER CODE END Error_Handler_Debug */
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}
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#ifdef USE_FULL_ASSERT
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#ifdef USE_FULL_ASSERT
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/**
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* @brief Reports the name of the source file and the source line number
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* where the assert_param error has occurred.
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* @param file: pointer to the source file name
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* @param line: assert_param error line source number
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* @retval None
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||||
*/
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* @brief Reports the name of the source file and the source line number
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* where the assert_param error has occurred.
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* @param file: pointer to the source file name
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* @param line: assert_param error line source number
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* @retval None
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*/
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void assert_failed(uint8_t *file, uint32_t line)
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{
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/* USER CODE BEGIN 6 */
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/* USER CODE BEGIN 6 */
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/* User can add his own implementation to report the file name and line number,
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ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
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/* USER CODE END 6 */
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/* USER CODE END 6 */
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}
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#endif /* USE_FULL_ASSERT */
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121
firmware/func_gen_stm32f303re_nucleo/Core/Src/spi.c
Normal file
121
firmware/func_gen_stm32f303re_nucleo/Core/Src/spi.c
Normal file
@@ -0,0 +1,121 @@
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||||
/* USER CODE BEGIN Header */
|
||||
/**
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||||
******************************************************************************
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||||
* @file spi.c
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||||
* @brief This file provides code for the configuration
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* of the SPI instances.
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******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
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||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "spi.h"
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|
||||
/* USER CODE BEGIN 0 */
|
||||
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||||
/* USER CODE END 0 */
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||||
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||||
SPI_HandleTypeDef hspi2;
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||||
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/* SPI2 init function */
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||||
void MX_SPI2_Init(void)
|
||||
{
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||||
|
||||
/* USER CODE BEGIN SPI2_Init 0 */
|
||||
|
||||
/* USER CODE END SPI2_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN SPI2_Init 1 */
|
||||
|
||||
/* USER CODE END SPI2_Init 1 */
|
||||
hspi2.Instance = SPI2;
|
||||
hspi2.Init.Mode = SPI_MODE_MASTER;
|
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hspi2.Init.Direction = SPI_DIRECTION_2LINES;
|
||||
hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
|
||||
hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
|
||||
hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
|
||||
hspi2.Init.NSS = SPI_NSS_SOFT;
|
||||
hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
|
||||
hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
||||
hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
|
||||
hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
||||
hspi2.Init.CRCPolynomial = 7;
|
||||
hspi2.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
|
||||
hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
|
||||
if (HAL_SPI_Init(&hspi2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN SPI2_Init 2 */
|
||||
|
||||
/* USER CODE END SPI2_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(spiHandle->Instance==SPI2)
|
||||
{
|
||||
/* USER CODE BEGIN SPI2_MspInit 0 */
|
||||
|
||||
/* USER CODE END SPI2_MspInit 0 */
|
||||
/* SPI2 clock enable */
|
||||
__HAL_RCC_SPI2_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**SPI2 GPIO Configuration
|
||||
PB13 ------> SPI2_SCK
|
||||
PB14 ------> SPI2_MISO
|
||||
PB15 ------> SPI2_MOSI
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN SPI2_MspInit 1 */
|
||||
|
||||
/* USER CODE END SPI2_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
|
||||
{
|
||||
|
||||
if(spiHandle->Instance==SPI2)
|
||||
{
|
||||
/* USER CODE BEGIN SPI2_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SPI2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_SPI2_CLK_DISABLE();
|
||||
|
||||
/**SPI2 GPIO Configuration
|
||||
PB13 ------> SPI2_SCK
|
||||
PB14 ------> SPI2_MISO
|
||||
PB15 ------> SPI2_MOSI
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
|
||||
|
||||
/* USER CODE BEGIN SPI2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SPI2_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
@@ -1,5 +1,5 @@
|
||||
##########################################################################################################################
|
||||
# File automatically-generated by tool: [projectgenerator] version: [3.17.1] date: [Sat Mar 25 17:33:18 CET 2023]
|
||||
# File automatically-generated by tool: [projectgenerator] version: [3.17.1] date: [Sat Mar 25 18:27:37 CET 2023]
|
||||
##########################################################################################################################
|
||||
|
||||
# ------------------------------------------------
|
||||
@@ -58,7 +58,16 @@ Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_flash_ex.c \
|
||||
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c.c \
|
||||
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_i2c_ex.c \
|
||||
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_exti.c \
|
||||
Core/Src/system_stm32f3xx.c
|
||||
Core/Src/system_stm32f3xx.c \
|
||||
Core/Src/spi.c \
|
||||
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi.c \
|
||||
Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_spi_ex.c
|
||||
|
||||
######################################
|
||||
# shared libs source
|
||||
######################################
|
||||
# ad9833
|
||||
C_SOURCES += ../shared_libs/drivers/ad9833/ad9833.c
|
||||
|
||||
# ASM sources
|
||||
ASM_SOURCES = \
|
||||
@@ -121,6 +130,8 @@ C_INCLUDES = \
|
||||
-IDrivers/CMSIS/Device/ST/STM32F3xx/Include \
|
||||
-IDrivers/CMSIS/Include
|
||||
|
||||
# ad9833 includes
|
||||
C_INCLUDES += -I../shared_libs/drivers/ad9833
|
||||
|
||||
# compile gcc flags
|
||||
ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections
|
||||
@@ -191,4 +202,4 @@ clean:
|
||||
#######################################
|
||||
-include $(wildcard $(BUILD_DIR)/*.d)
|
||||
|
||||
# *** EOF ***
|
||||
# *** EOF ***
|
||||
|
||||
@@ -1,28 +1,33 @@
|
||||
#MicroXplorer Configuration settings - do not modify
|
||||
File.Version=6
|
||||
GPIO.groupedBy=Group By Peripherals
|
||||
KeepUserPlacement=false
|
||||
Mcu.CPN=STM32F303RET6
|
||||
Mcu.Family=STM32F3
|
||||
Mcu.IP0=NVIC
|
||||
Mcu.IP1=RCC
|
||||
Mcu.IP2=SYS
|
||||
Mcu.IP3=USART2
|
||||
Mcu.IPNb=4
|
||||
Mcu.IP2=SPI2
|
||||
Mcu.IP3=SYS
|
||||
Mcu.IP4=USART2
|
||||
Mcu.IPNb=5
|
||||
Mcu.Name=STM32F303R(D-E)Tx
|
||||
Mcu.Package=LQFP64
|
||||
Mcu.Pin0=PC13
|
||||
Mcu.Pin1=PC14-OSC32_IN
|
||||
Mcu.Pin10=PB3
|
||||
Mcu.Pin11=VP_SYS_VS_Systick
|
||||
Mcu.Pin10=PB15
|
||||
Mcu.Pin11=PA13
|
||||
Mcu.Pin12=PA14
|
||||
Mcu.Pin13=PB3
|
||||
Mcu.Pin14=VP_SYS_VS_Systick
|
||||
Mcu.Pin2=PC15-OSC32_OUT
|
||||
Mcu.Pin3=PF0-OSC_IN
|
||||
Mcu.Pin4=PF1-OSC_OUT
|
||||
Mcu.Pin5=PA2
|
||||
Mcu.Pin6=PA3
|
||||
Mcu.Pin7=PA5
|
||||
Mcu.Pin8=PA13
|
||||
Mcu.Pin9=PA14
|
||||
Mcu.PinsNb=12
|
||||
Mcu.Pin8=PB13
|
||||
Mcu.Pin9=PB14
|
||||
Mcu.PinsNb=15
|
||||
Mcu.ThirdPartyNb=0
|
||||
Mcu.UserConstants=
|
||||
Mcu.UserName=STM32F303RETx
|
||||
@@ -72,6 +77,12 @@ PA5.GPIO_PuPd=GPIO_NOPULL
|
||||
PA5.GPIO_Speed=GPIO_SPEED_FREQ_LOW
|
||||
PA5.Locked=true
|
||||
PA5.Signal=GPIO_Output
|
||||
PB13.Mode=Full_Duplex_Master
|
||||
PB13.Signal=SPI2_SCK
|
||||
PB14.Mode=Full_Duplex_Master
|
||||
PB14.Signal=SPI2_MISO
|
||||
PB15.Mode=Full_Duplex_Master
|
||||
PB15.Signal=SPI2_MOSI
|
||||
PB3.GPIOParameters=GPIO_Label
|
||||
PB3.GPIO_Label=SWO
|
||||
PB3.Locked=true
|
||||
@@ -171,6 +182,14 @@ RCC.USBFreq_Value=72000000
|
||||
RCC.VCOOutput2Freq_Value=8000000
|
||||
SH.GPXTI13.0=GPIO_EXTI13
|
||||
SH.GPXTI13.ConfNb=1
|
||||
SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_32
|
||||
SPI2.CalculateBaudRate=1.125 MBits/s
|
||||
SPI2.DataSize=SPI_DATASIZE_8BIT
|
||||
SPI2.Direction=SPI_DIRECTION_2LINES
|
||||
SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize,NSSPMode,BaudRatePrescaler
|
||||
SPI2.Mode=SPI_MODE_MASTER
|
||||
SPI2.NSSPMode=SPI_NSS_PULSE_ENABLE
|
||||
SPI2.VirtualType=VM_MASTER
|
||||
USART2.IPParameters=VirtualMode-Asynchronous
|
||||
USART2.VirtualMode-Asynchronous=VM_ASYNC
|
||||
VP_SYS_VS_Systick.Mode=SysTick
|
||||
|
||||
217
firmware/shared_libs/drivers/ad9833/ad9833.c
Normal file
217
firmware/shared_libs/drivers/ad9833/ad9833.c
Normal file
@@ -0,0 +1,217 @@
|
||||
// Author: https://github.com/MajicDesigns/MD_AD9833
|
||||
#include "main.h"
|
||||
#include "ad9833_def.h"
|
||||
#include "ad9833.h"
|
||||
|
||||
// Convenience calculations
|
||||
static uint32_t ad9833_calcFreq(float f); // Calculate AD9833 frequency register from a frequency
|
||||
static uint16_t ad9833_calcPhase(float a); // Calculate AD9833 phase register from phase
|
||||
|
||||
static void ad9833_transmit16(ad9833_handle_t *hfg, uint16_t data)
|
||||
{
|
||||
uint8_t data8;
|
||||
HAL_GPIO_WritePin(hfg->cs_port, hfg->cs_pin, GPIO_PIN_RESET);
|
||||
data8 = (uint8_t)((data >> 8) & 0x00FF);
|
||||
HAL_SPI_Transmit(hfg->hspi, &data8, 1, 1);
|
||||
data8 = (uint8_t)(data & 0x00FF);
|
||||
HAL_SPI_Transmit(hfg->hspi, &data8, 1, 1);
|
||||
HAL_GPIO_WritePin(hfg->cs_port, hfg->cs_pin, GPIO_PIN_SET);
|
||||
}
|
||||
|
||||
void ad9833_reset(ad9833_handle_t *hfg, uint8_t hold)
|
||||
// Reset is done on a 1 to 0 transition
|
||||
{
|
||||
hfg->_regCtl |= (1 << AD_RESET);
|
||||
ad9833_transmit16(hfg, hfg->_regCtl);
|
||||
|
||||
if (!hold)
|
||||
{
|
||||
hfg->_regCtl &= ~(1 << AD_RESET);
|
||||
ad9833_transmit16(hfg, hfg->_regCtl);
|
||||
}
|
||||
}
|
||||
|
||||
void ad9833_init(ad9833_handle_t *hfg, SPI_HandleTypeDef *hspi, GPIO_TypeDef *cs_port, uint16_t cs_pin)
|
||||
// Initialise the AD9833 and then set up safe values for the AD9833 device
|
||||
// Procedure from Figure 27 of in the AD9833 Data Sheet
|
||||
{
|
||||
// initialise our preferred CS pin (could be same as SS)
|
||||
hfg->hspi = hspi;
|
||||
hfg->cs_port = cs_port;
|
||||
hfg->cs_pin = cs_pin;
|
||||
|
||||
hfg->_regCtl = 0;
|
||||
hfg->_regCtl |= (1 << AD_B28); // always write 2 words consecutively for frequency
|
||||
ad9833_transmit16(hfg, hfg->_regCtl);
|
||||
|
||||
ad9833_reset(hfg, 1); // Reset and hold
|
||||
ad9833_setFrequency(hfg, CHAN_0, AD_DEFAULT_FREQ);
|
||||
ad9833_setFrequency(hfg, CHAN_1, AD_DEFAULT_FREQ);
|
||||
ad9833_setPhase(hfg, CHAN_0, AD_DEFAULT_PHASE);
|
||||
ad9833_setPhase(hfg, CHAN_1, AD_DEFAULT_PHASE);
|
||||
ad9833_reset(hfg, 0); // full transition
|
||||
|
||||
ad9833_setMode(hfg, MODE_OFF);
|
||||
ad9833_setActiveChannelFreq(hfg, CHAN_0);
|
||||
ad9833_setActiveChannelPhase(hfg, CHAN_0);
|
||||
}
|
||||
|
||||
void ad9833_setActiveChannelFreq(ad9833_handle_t *hfg, AD_channel_t chan)
|
||||
{
|
||||
// PRINT("\nsetActiveFreq CHAN_", chan);
|
||||
|
||||
switch (chan)
|
||||
{
|
||||
case CHAN_0:
|
||||
hfg->_regCtl &= ~(1 << AD_FSELECT);
|
||||
break;
|
||||
case CHAN_1:
|
||||
hfg->_regCtl |= (1 << AD_FSELECT);
|
||||
break;
|
||||
}
|
||||
|
||||
ad9833_transmit16(hfg, hfg->_regCtl);
|
||||
}
|
||||
|
||||
AD_channel_t ad9833_getActiveChannelFreq(ad9833_handle_t *hfg)
|
||||
{
|
||||
return (hfg->_regCtl & (1 << AD_FSELECT)) ? CHAN_1 : CHAN_0;
|
||||
};
|
||||
|
||||
void ad9833_setActiveChannelPhase(ad9833_handle_t *hfg, AD_channel_t chan)
|
||||
{
|
||||
// PRINT("\nsetActivePhase CHAN_", chan);
|
||||
|
||||
switch (chan)
|
||||
{
|
||||
case CHAN_0:
|
||||
hfg->_regCtl &= ~(1 << AD_PSELECT);
|
||||
break;
|
||||
case CHAN_1:
|
||||
hfg->_regCtl |= (1 << AD_PSELECT);
|
||||
break;
|
||||
}
|
||||
|
||||
ad9833_transmit16(hfg, hfg->_regCtl);
|
||||
}
|
||||
|
||||
AD_channel_t ad9833_getActiveChannelPhase(ad9833_handle_t *hfg)
|
||||
{
|
||||
return (hfg->_regCtl & (1 << AD_PSELECT)) ? CHAN_1 : CHAN_0;
|
||||
};
|
||||
|
||||
void ad9833_setMode(ad9833_handle_t *hfg, AD_mode_t mode)
|
||||
{
|
||||
// PRINTS("\nsetWave ");
|
||||
hfg->_mode = mode;
|
||||
|
||||
switch (mode)
|
||||
{
|
||||
case MODE_OFF:
|
||||
hfg->_regCtl &= ~(1 << AD_OPBITEN);
|
||||
hfg->_regCtl &= ~(1 << AD_MODE);
|
||||
hfg->_regCtl |= (1 << AD_SLEEP1);
|
||||
hfg->_regCtl |= (1 << AD_SLEEP12);
|
||||
break;
|
||||
case MODE_SINE:
|
||||
hfg->_regCtl &= ~(1 << AD_OPBITEN);
|
||||
hfg->_regCtl &= ~(1 << AD_MODE);
|
||||
hfg->_regCtl &= ~(1 << AD_SLEEP1);
|
||||
hfg->_regCtl &= ~(1 << AD_SLEEP12);
|
||||
break;
|
||||
case MODE_SQUARE1:
|
||||
hfg->_regCtl |= (1 << AD_OPBITEN);
|
||||
hfg->_regCtl &= ~(1 << AD_MODE);
|
||||
hfg->_regCtl |= (1 << AD_DIV2);
|
||||
hfg->_regCtl &= ~(1 << AD_SLEEP1);
|
||||
hfg->_regCtl &= ~(1 << AD_SLEEP12);
|
||||
break;
|
||||
case MODE_SQUARE2:
|
||||
hfg->_regCtl |= (1 << AD_OPBITEN);
|
||||
hfg->_regCtl &= ~(1 << AD_MODE);
|
||||
hfg->_regCtl &= ~(1 << AD_DIV2);
|
||||
hfg->_regCtl &= ~(1 << AD_SLEEP1);
|
||||
hfg->_regCtl &= ~(1 << AD_SLEEP12);
|
||||
break;
|
||||
case MODE_TRIANGLE:
|
||||
hfg->_regCtl &= ~(1 << AD_OPBITEN);
|
||||
hfg->_regCtl |= (1 << AD_MODE);
|
||||
hfg->_regCtl &= ~(1 << AD_SLEEP1);
|
||||
hfg->_regCtl &= ~(1 << AD_SLEEP12);
|
||||
break;
|
||||
}
|
||||
|
||||
ad9833_transmit16(hfg, hfg->_regCtl);
|
||||
}
|
||||
|
||||
static uint32_t ad9833_calcFreq(float f)
|
||||
// Calculate register value for AD9833 frequency register from a frequency
|
||||
{
|
||||
return (uint32_t)((f * AD_2POW28 / AD_MCLK) + 0.5);
|
||||
}
|
||||
|
||||
static uint16_t ad9833_calcPhase(float a)
|
||||
// Calculate the value for AD9833 phase register from given phase in tenths of a degree
|
||||
{
|
||||
return (uint16_t)((512.0 * (a / 10) / 45) + 0.5);
|
||||
}
|
||||
|
||||
void ad9833_setFrequency(ad9833_handle_t *hfg, AD_channel_t chan, float freq)
|
||||
{
|
||||
// PRINT("\nsetFreq CHAN_", chan);
|
||||
uint16_t freq_channel = 0;
|
||||
|
||||
hfg->_freq[chan] = freq;
|
||||
|
||||
hfg->_regFreq[chan] = ad9833_calcFreq(freq);
|
||||
|
||||
// select the address mask
|
||||
|
||||
switch (chan)
|
||||
{
|
||||
case CHAN_0:
|
||||
freq_channel = SEL_FREQ0;
|
||||
break;
|
||||
case CHAN_1:
|
||||
freq_channel = SEL_FREQ1;
|
||||
break;
|
||||
default:
|
||||
// error
|
||||
break;
|
||||
}
|
||||
|
||||
// Assumes B28 is on so we can send consecutive words
|
||||
// B28 is set by default for the library, so just send it here
|
||||
// Now send the two parts of the frequency 14 bits at a time,
|
||||
// LSBs first
|
||||
|
||||
// spiSend(_regCtl); // set B28
|
||||
ad9833_transmit16(hfg, freq_channel | (uint16_t)(hfg->_regFreq[chan] & 0x3fff));
|
||||
ad9833_transmit16(hfg, freq_channel | (uint16_t)((hfg->_regFreq[chan] >> 14) & 0x3fff));
|
||||
}
|
||||
|
||||
void ad9833_setPhase(ad9833_handle_t *hfg, AD_channel_t chan, uint16_t phase)
|
||||
{
|
||||
// PRINT("\nsetPhase CHAN_", chan);
|
||||
uint16_t phase_channel = 0;
|
||||
|
||||
hfg->_phase[chan] = phase;
|
||||
hfg->_regPhase[chan] = ad9833_calcPhase(phase);
|
||||
|
||||
// select the address mask
|
||||
switch (chan)
|
||||
{
|
||||
case CHAN_0:
|
||||
phase_channel = SEL_PHASE0;
|
||||
break;
|
||||
case CHAN_1:
|
||||
phase_channel = SEL_PHASE1;
|
||||
break;
|
||||
default:
|
||||
// error
|
||||
break;
|
||||
}
|
||||
|
||||
// Now send the phase as 12 bits with appropriate address bits
|
||||
ad9833_transmit16(hfg, phase_channel | (0xfff & hfg->_regPhase[chan]));
|
||||
}
|
||||
56
firmware/shared_libs/drivers/ad9833/ad9833.h
Normal file
56
firmware/shared_libs/drivers/ad9833/ad9833.h
Normal file
@@ -0,0 +1,56 @@
|
||||
#pragma once
|
||||
|
||||
#define AD_DEFAULT_FREQ 1000U ///< Default initialisation frequency (Hz)
|
||||
#define AD_DEFAULT_PHASE 0 ///< Default initialisation phase angle (degrees)
|
||||
#define AD_MCLK 25000000UL ///< Clock speed of the AD9833 reference clock in Hz
|
||||
/**
|
||||
* Channel enumerated type.
|
||||
*
|
||||
* This enumerated type is used with the to specify which channel
|
||||
* is being invoked on operations that could be channel related.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CHAN_0 = 0, ///< Channel 0 definition
|
||||
CHAN_1 = 1, ///< Channel 1 definition
|
||||
} AD_channel_t;
|
||||
|
||||
/**
|
||||
* Output mode request enumerated type.
|
||||
*
|
||||
* This enumerated type is used with the \ref setMode() methods to identify
|
||||
* the mode request.
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
MODE_OFF, ///< Set output all off
|
||||
MODE_SINE, ///< Set output to a sine wave at selected frequency
|
||||
MODE_SQUARE1, ///< Set output to a square wave at selected frequency
|
||||
MODE_SQUARE2, ///< Set output to a square wave at half selected frequency
|
||||
MODE_TRIANGLE, ///< Set output to a triangle wave at selected frequency
|
||||
} AD_mode_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t _regCtl; // control register image
|
||||
uint32_t _regFreq[2]; // frequency registers
|
||||
uint32_t _regPhase[2]; // phase registers
|
||||
|
||||
AD_mode_t _mode; // last set mode
|
||||
float _freq[2]; // last frequencies set
|
||||
uint16_t _phase[2]; // last phase setting
|
||||
|
||||
SPI_HandleTypeDef *hspi;
|
||||
GPIO_TypeDef *cs_port;
|
||||
uint16_t cs_pin;
|
||||
} ad9833_handle_t;
|
||||
|
||||
void ad9833_init(ad9833_handle_t *hfg, SPI_HandleTypeDef *hspi, GPIO_TypeDef *cs_port, uint16_t cs_pin);
|
||||
void ad9833_reset(ad9833_handle_t *hfg, uint8_t hold);
|
||||
void ad9833_setActiveChannelFreq(ad9833_handle_t *hfg, AD_channel_t chan);
|
||||
AD_channel_t ad9833_getActiveChannelFreq(ad9833_handle_t *hfg);
|
||||
void ad9833_setActiveChannelPhase(ad9833_handle_t *hfg, AD_channel_t chan);
|
||||
AD_channel_t ad9833_getActiveChannelPhase(ad9833_handle_t *hfg);
|
||||
void ad9833_setMode(ad9833_handle_t *hfg, AD_mode_t mode);
|
||||
void ad9833_setFrequency(ad9833_handle_t *hfg, AD_channel_t chan, float freq);
|
||||
void ad9833_setPhase(ad9833_handle_t *hfg, AD_channel_t chan, uint16_t phase);
|
||||
46
firmware/shared_libs/drivers/ad9833/ad9833_def.h
Normal file
46
firmware/shared_libs/drivers/ad9833/ad9833_def.h
Normal file
@@ -0,0 +1,46 @@
|
||||
// Author: https://github.com/MajicDesigns/MD_AD9833
|
||||
#pragma once
|
||||
|
||||
#include "main.h"
|
||||
|
||||
/** @}*/
|
||||
|
||||
// AD9833 Control Register bit definitions
|
||||
#define AD_B28 13 ///< B28 = 1 allows a complete word to be loaded into a frequency register in
|
||||
///< two consecutive writes. When B28 = 0, the 28-bit frequency register
|
||||
///< operates as two 14-bit registers.
|
||||
#define AD_HLB 12 ///< Control bit allows the user to continuously load the MSBs or LSBs of a
|
||||
///< frequency register while ignoring the remaining 14 bits. HLB is used
|
||||
///< in conjunction with B28; when B28 = 1, this control bit is ignored.
|
||||
#define AD_FSELECT 11 ///< Defines whether the FREQ0 register or the FREQ1 register is used in
|
||||
///< the phase accumulator.
|
||||
#define AD_PSELECT 10 ///< Defines whether the PHASE0 register or the PHASE1 register data is
|
||||
///< added to the output of the phase accumulator.
|
||||
#define AD_RESET 8 ///< Reset = 1 resets internal registers to 0, which corresponds to an
|
||||
///< analog output of midscale. Reset = 0 disables reset.
|
||||
#define AD_SLEEP1 7 ///< When SLEEP1 = 1, the internal MCLK clock is disabled, and the DAC output
|
||||
///< remains at its present value. When SLEEP1 = 0, MCLK is enabled.
|
||||
#define AD_SLEEP12 6 ///< SLEEP12 = 1 powers down the on-chip DAC. SLEEP12 = 0 implies that
|
||||
///< the DAC is active.
|
||||
#define AD_OPBITEN 5 ///< When OPBITEN = 1, the output of the DAC is no longer available at the
|
||||
///< VOUT pin, replaced by MSB (or MSB/2) of the DAC. When OPBITEN = 0, the
|
||||
///< DAC is connected to VOUT.
|
||||
#define AD_DIV2 3 ///< When DIV2 = 1, the MSB of the DAC data is passed to the VOUT pin. When
|
||||
///< DIV2 = 0, the MSB/2 of the DAC data is output at the VOUT pin.
|
||||
#define AD_MODE 1 ///< When MODE = 1, the SIN ROM is bypassed, resulting in a triangle output
|
||||
///< from the DAC. When MODE = 0, the SIN ROM is used which results in a
|
||||
///< sinusoidal signal at the output.
|
||||
|
||||
// AD9833 Frequency and Phase register bit definitions
|
||||
#define AD_FREQ1 15 ///< Select frequency 1 register
|
||||
#define AD_FREQ0 14 ///< Select frequency 0 register
|
||||
#define AD_PHASE 13 ///< Select the phase register
|
||||
|
||||
// AD9833 Freq and Phase register address identifiers
|
||||
#define SEL_FREQ0 (1 << AD_FREQ0)
|
||||
#define SEL_FREQ1 (1 << AD_FREQ1)
|
||||
#define SEL_PHASE0 (1 << AD_FREQ0 | 1 << AD_FREQ1 | 0 << AD_PHASE)
|
||||
#define SEL_PHASE1 (1 << AD_FREQ0 | 1 << AD_FREQ1 | 1 << AD_PHASE)
|
||||
|
||||
// AD9833 frequency and phase calculation macros
|
||||
#define AD_2POW28 (1UL << 28) ///< Used when calculating output frequency
|
||||
Reference in New Issue
Block a user