136 lines
5.1 KiB
Plaintext
136 lines
5.1 KiB
Plaintext
Configuration Name: HOSTMOT2
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General configuration information:
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BoardName : MESA7I92
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FPGA Size: 20 KGates
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FPGA Pins: 256
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Number of IO Ports: 2
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Width of one I/O port: 17
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Clock Low frequency: 100.0000 MHz
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Clock High frequency: 175.0000 MHz
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IDROM Type: 3
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Instance Stride 0: 4
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Instance Stride 1: 64
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Register Stride 0: 256
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Register Stride 1: 256
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Modules in configuration:
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Module: DPLL
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There are 1 of DPLL in configuration
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Version: 0
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Registers: 7
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BaseAddress: 7000
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 4 bytes
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Module: WatchDog
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There are 1 of WatchDog in configuration
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Version: 0
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Registers: 3
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BaseAddress: 0C00
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 4 bytes
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Module: IOPort
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There are 2 of IOPort in configuration
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Version: 0
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Registers: 5
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BaseAddress: 1000
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 4 bytes
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Module: MuxedQCount
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There are 6 of MuxedQCount in configuration
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Version: 4
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Registers: 5
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BaseAddress: 3600
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 4 bytes
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Module: MuxedQCountSel
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There are 1 of MuxedQCountSel in configuration
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Version: 0
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Registers: 0
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BaseAddress: 0000
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 4 bytes
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Module: SSerial
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There are 1 of SSerial in configuration
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Version: 0
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Registers: 6
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BaseAddress: 5B00
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 64 bytes
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Module: StepGen
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There are 5 of StepGen in configuration
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Version: 2
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Registers: 10
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BaseAddress: 2000
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 4 bytes
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Module: LED
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There are 1 of LED in configuration
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Version: 0
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Registers: 1
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BaseAddress: 0200
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 4 bytes
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Configuration pin-out:
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IO Connections for P2 -> 7I76
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Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
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TB2-4,5 0 IOPort StepGen 0 Dir/Table2 (Out)
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TB2-2,3 1 IOPort StepGen 0 Step/Table1 (Out)
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TB2-10,11 2 IOPort StepGen 1 Dir/Table2 (Out)
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TB2-8,9 3 IOPort StepGen 1 Step/Table1 (Out)
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TB2-16,17 4 IOPort StepGen 2 Dir/Table2 (Out)
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TB2-14,15 5 IOPort StepGen 2 Step/Table1 (Out)
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TB2-22,23 6 IOPort StepGen 3 Dir/Table2 (Out)
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TB2-20,21 7 IOPort StepGen 3 Step/Table1 (Out)
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TB3-4,5 8 IOPort StepGen 4 Dir/Table2 (Out)
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TB3-2,3 9 IOPort StepGen 4 Step/Table1 (Out)
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Internal-Field-IO 10 IOPort SSerial 0 TXData0 (Out)
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Internal-Field-IO 11 IOPort SSerial 0 RXData0 (In)
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TB3-18,19 12 IOPort SSerial 0 TXData1 (Out)
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TB3-16,17 13 IOPort SSerial 0 RXData1 (In)
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TB3-13,14 14 IOPort MuxedQCount 2 MuxQ-IDX (In)
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TB3-10,11 15 IOPort MuxedQCount 2 MuxQ-B (In)
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TB3-7,8 16 IOPort MuxedQCount 2 MuxQ-A (In)
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IO Connections for P1 -> 7I85
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Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
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TB1-19,20 17 IOPort SSerial 0 RXData6 (In)
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TB1-21,22 18 IOPort SSerial 0 TXData6 (Out)
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TB1-11,12 19 IOPort SSerial 0 RXData5 (In)
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TB1-13,14 20 IOPort SSerial 0 TXData5 (Out)
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TB1-3,4 21 IOPort SSerial 0 RXData4 (In)
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TB1-5,6 22 IOPort SSerial 0 TXData4 (Out)
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TB2-19,20 23 IOPort SSerial 0 RXData3 (In)
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TB2-21,22 24 IOPort SSerial 0 TXData3 (Out)
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TB2-11,12 25 IOPort SSerial 0 RXData2 (In)
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TB2-13,14 26 IOPort SSerial 0 TXData2 (Out)
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Internal-EncMux 27 IOPort MuxedQCountSel 0 MuxSel0 (Out)
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TB3-1,2,9,10 28 IOPort MuxedQCount 0 MuxQ-A (In)
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TB3-4,5,12,13 29 IOPort MuxedQCount 0 MuxQ-B (In)
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TB3-7,8,12,13 30 IOPort MuxedQCount 0 MuxQ-IDX (In)
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TB3-17,18,TB2-1,2 31 IOPort MuxedQCount 1 MuxQ-A (In)
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TB3-20,21,TB2-4,5 32 IOPort MuxedQCount 1 MuxQ-B (In)
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TB3-23,24,TB2-7,8 33 IOPort MuxedQCount 1 MuxQ-IDX (In)
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