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[fix] modify calc freq/phase and correct bugs

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bartool
2023-07-31 21:01:49 +02:00
parent a690f3a209
commit d3d896a419
10 changed files with 127 additions and 56 deletions
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17
firmware/shared_libs/controllers/ctrl_generator.c
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@@ -90,7 +90,6 @@ void led_off(GEN_led_t *hled)
void gen_init()
{
ad9833_init(&dds_gen[FG_CHAN1].hdds, &hspi2, DDS1_CS_GPIO_Port, DDS1_CS_Pin);
ad9833_setMode(&dds_gen[FG_CHAN1].hdds, MODE_OFF);
ad9833_init(&dds_gen[FG_CHAN2].hdds, &hspi2, DDS2_CS_GPIO_Port, DDS2_CS_Pin);
// ad9833_init(&dds_gen[FG_CHAN3].hdds, &hspi2, DDS3_CS_PORT, DDS3_CS_PIN);
@@ -99,11 +98,11 @@ void gen_init()
// ltc2631_init(&dds_gen[FG_CHAN3].hoffs, &hi2c1, 0x02, LTC2631_8BIT, LTC_REF_2V5);
mcp41x_init(&dds_gen[FG_CHAN1].hampl, &hspi2, AMP1_CS_GPIO_Port, AMP1_CS_Pin, MCP41X_10K);
mcp41x_setValue(&dds_gen[FG_CHAN1].hampl, 0);
mcp41x_init(&dds_gen[FG_CHAN1].hampl, &hspi2, AMP2_CS_GPIO_Port, AMP2_CS_Pin, MCP41X_10K);
// mcp41x_init(&dds_gen[FG_CHAN1].hampl, &hspi2, AMP3_CS_PORT, AMP3_CS_PIN, MCP41X_10K);
mcp41x_init(&dds_gen[FG_CHAN2].hampl, &hspi2, AMP2_CS_GPIO_Port, AMP2_CS_Pin, MCP41X_10K);
// mcp41x_init(&dds_gen[FG_CHAN3].hampl, &hspi2, AMP3_CS_PORT, AMP3_CS_PIN, MCP41X_10K);
led_init(&dds_gen[FG_CHAN1].hled, LED_CH1_GPIO_Port, LED_CH1_Pin);
led_init(&dds_gen[FG_CHAN2].hled, LED_CH2_GPIO_Port, LED_CH2_Pin);
}
static void _setAmpliude(mcp41x_handle_t *hampl, uint16_t ampl_x100)
@@ -116,25 +115,25 @@ static void _setAmpliude(mcp41x_handle_t *hampl, uint16_t ampl_x100)
static void _setOffset(ltc2631_handle_t *hoffs, int16_t offs_x100)
{
uint32_t value = (offs_x100 + MAX_VOLT_POS) * LTC_REF_2V5;
ULOG_DEBUG("(%d:_setAmplitude) offs_x100: %d, value: %d", __LINE__, offs_x100, value);
ULOG_DEBUG("(%d:_setOffset) offs_x100: %d, value: %d", __LINE__, offs_x100, value);
ltc2631_setOutputVoltage_u(hoffs, value);
}
static void _setFreqDdsGen(ad9833_handle_t *hdds, uint32_t freq)
{
ULOG_DEBUG("(%d:_setAmplitude) freq: %d", __LINE__, freq);
ULOG_DEBUG("(%d:_setFreqDdsGen) freq: %d", __LINE__, freq);
ad9833_setFrequency(hdds, CHAN_0, freq);
}
static void _setPhaseDdsGen(ad9833_handle_t *hdds, uint32_t phas)
{
ULOG_DEBUG("(%d:_setAmplitude) phase: %d", __LINE__, phas);
ULOG_DEBUG("(%d:_setPhaseDdsGen) phase: %d", __LINE__, phas);
ad9833_setPhase(hdds, CHAN_0, phas);
}
static void _setWaveDdsGen(ad9833_handle_t *hdds, GEN_wave_t wave)
{
ULOG_DEBUG("(%d:_setAmplitude) wave: %d", __LINE__, wave);
ULOG_DEBUG("(%d:_setWaveDdsGen) wave: %d", __LINE__, wave);
switch (wave)
{
case GEN_SIN:
@@ -155,7 +154,7 @@ static void _setWaveDdsGen(ad9833_handle_t *hdds, GEN_wave_t wave)
static void _setEnabledDdsGen(FG_handle_t *hfg, GEN_fg_t *gen)
{
ULOG_DEBUG("(%d:_setAmplitude) phase: %d", __LINE__, gen->enabled);
ULOG_DEBUG("(%d:_setEnabledDdsGen) enabled: %d", __LINE__, gen->enabled);
switch (gen->enabled)
{
case FALSE: