init
This commit is contained in:
BIN
7i92t_16m_fallback.bin
Normal file
BIN
7i92t_16m_fallback.bin
Normal file
Binary file not shown.
BIN
7i92t_5abob_encd.bin
Normal file
BIN
7i92t_5abob_encd.bin
Normal file
Binary file not shown.
126
7i92t_5abob_encd.pin
Normal file
126
7i92t_5abob_encd.pin
Normal file
@@ -0,0 +1,126 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 175.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
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||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
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||||||
|
Instance Stride: 4 bytes
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||||||
|
|
||||||
|
Module: WatchDog
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||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
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||||||
|
ClockFrequency: 100.000 MHz
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||||||
|
Register Stride: 256 bytes
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||||||
|
Instance Stride: 4 bytes
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||||||
|
|
||||||
|
Module: IOPort
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||||||
|
There are 2 of IOPort in configuration
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||||||
|
Version: 0
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||||||
|
Registers: 5
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||||||
|
BaseAddress: 1000
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||||||
|
ClockFrequency: 100.000 MHz
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||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
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||||||
|
|
||||||
|
Module: QCount
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||||||
|
There are 6 of QCount in configuration
|
||||||
|
Version: 2
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||||||
|
Registers: 5
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||||||
|
BaseAddress: 3000
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||||||
|
ClockFrequency: 100.000 MHz
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||||||
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Register Stride: 256 bytes
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||||||
|
Instance Stride: 4 bytes
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||||||
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||||||
|
Module: StepGen
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||||||
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There are 5 of StepGen in configuration
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||||||
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Version: 2
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||||||
|
Registers: 10
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||||||
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BaseAddress: 2000
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||||||
|
ClockFrequency: 100.000 MHz
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||||||
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Register Stride: 256 bytes
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||||||
|
Instance Stride: 4 bytes
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||||||
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||||||
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Module: PWM
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||||||
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There are 1 of PWM in configuration
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||||||
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Version: 0
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||||||
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Registers: 5
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||||||
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BaseAddress: 4100
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||||||
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ClockFrequency: 175.000 MHz
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||||||
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Register Stride: 256 bytes
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||||||
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Instance Stride: 4 bytes
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||||||
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|
||||||
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Module: LED
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||||||
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There are 1 of LED in configuration
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||||||
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Version: 0
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||||||
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Registers: 1
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||||||
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BaseAddress: 0200
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||||||
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ClockFrequency: 100.000 MHz
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||||||
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Register Stride: 256 bytes
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||||||
|
Instance Stride: 4 bytes
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||||||
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||||||
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Configuration pin-out:
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IO Connections for P2
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DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
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1 0 IOPort PWM 0 PWM (Out)
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14 1 IOPort None
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2 2 IOPort StepGen 0 Step/Table1 (Out)
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15 3 IOPort None
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3 4 IOPort StepGen 0 Dir/Table2 (Out)
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16 5 IOPort StepGen 4 Step/Table1 (Out)
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4 6 IOPort StepGen 1 Step/Table1 (Out)
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17 7 IOPort StepGen 4 Dir/Table2 (Out)
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5 8 IOPort StepGen 1 Dir/Table2 (Out)
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6 9 IOPort StepGen 2 Step/Table1 (Out)
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7 10 IOPort StepGen 2 Dir/Table2 (Out)
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8 11 IOPort StepGen 3 Step/Table1 (Out)
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9 12 IOPort StepGen 3 Dir/Table2 (Out)
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10 13 IOPort None
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11 14 IOPort QCount 0 Quad-A (In)
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12 15 IOPort QCount 0 Quad-B (In)
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13 16 IOPort QCount 0 Quad-IDX (In)
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IO Connections for P1 -> HDR26
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Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
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1 17 IOPort QCount 1 Quad-A (In)
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2 18 IOPort QCount 1 Quad-B (In)
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3 19 IOPort QCount 1 Quad-IDX (In)
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4 20 IOPort QCount 2 Quad-A (In)
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5 21 IOPort QCount 2 Quad-B (In)
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6 22 IOPort QCount 2 Quad-IDX (In)
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7 23 IOPort QCount 3 Quad-A (In)
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8 24 IOPort QCount 3 Quad-B (In)
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9 25 IOPort QCount 3 Quad-IDX (In)
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11 26 IOPort QCount 4 Quad-A (In)
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13 27 IOPort QCount 4 Quad-B (In)
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15 28 IOPort QCount 4 Quad-IDX (In)
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17 29 IOPort QCount 5 Quad-A (In)
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19 30 IOPort QCount 5 Quad-B (In)
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21 31 IOPort QCount 5 Quad-IDX (In)
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23 32 IOPort None
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25 33 IOPort None
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BIN
7i92t_5abobx2d.bin
Normal file
BIN
7i92t_5abobx2d.bin
Normal file
Binary file not shown.
126
7i92t_5abobx2d.pin
Normal file
126
7i92t_5abobx2d.pin
Normal file
@@ -0,0 +1,126 @@
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|||||||
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Configuration Name: HOSTMOT2
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||||||
|
|
||||||
|
General configuration information:
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|
|
||||||
|
BoardName : MESA7I92
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||||||
|
FPGA Size: 20 KGates
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||||||
|
FPGA Pins: 256
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||||||
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Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 180.0000 MHz
|
||||||
|
IDROM Type: 3
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||||||
|
Instance Stride 0: 4
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||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
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||||||
|
Version: 0
|
||||||
|
Registers: 7
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||||||
|
BaseAddress: 7000
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||||||
|
ClockFrequency: 100.000 MHz
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||||||
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Register Stride: 256 bytes
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||||||
|
Instance Stride: 4 bytes
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||||||
|
|
||||||
|
Module: WatchDog
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||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
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||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
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||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
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||||||
|
There are 2 of IOPort in configuration
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||||||
|
Version: 0
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||||||
|
Registers: 5
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||||||
|
BaseAddress: 1000
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||||||
|
ClockFrequency: 100.000 MHz
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||||||
|
Register Stride: 256 bytes
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||||||
|
Instance Stride: 4 bytes
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||||||
|
|
||||||
|
Module: QCount
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||||||
|
There are 2 of QCount in configuration
|
||||||
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Version: 2
|
||||||
|
Registers: 5
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||||||
|
BaseAddress: 3000
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||||||
|
ClockFrequency: 100.000 MHz
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||||||
|
Register Stride: 256 bytes
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||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: StepGen
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||||||
|
There are 10 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
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||||||
|
ClockFrequency: 100.000 MHz
|
||||||
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Register Stride: 256 bytes
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||||||
|
Instance Stride: 4 bytes
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||||||
|
|
||||||
|
Module: PWM
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||||||
|
There are 2 of PWM in configuration
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||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 4100
|
||||||
|
ClockFrequency: 180.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort PWM 0 PWM (Out)
|
||||||
|
14 1 IOPort None
|
||||||
|
2 2 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
15 3 IOPort None
|
||||||
|
3 4 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
16 5 IOPort StepGen 8 Step/Table1 (Out)
|
||||||
|
4 6 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
17 7 IOPort StepGen 8 Dir/Table2 (Out)
|
||||||
|
5 8 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
6 9 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
7 10 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
8 11 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
9 12 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
10 13 IOPort None
|
||||||
|
11 14 IOPort QCount 0 Quad-A (In)
|
||||||
|
12 15 IOPort QCount 0 Quad-B (In)
|
||||||
|
13 16 IOPort QCount 0 Quad-IDX (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort PWM 1 PWM (Out)
|
||||||
|
14 18 IOPort None
|
||||||
|
2 19 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
15 20 IOPort None
|
||||||
|
3 21 IOPort StepGen 4 Dir/Table2 (Out)
|
||||||
|
16 22 IOPort StepGen 9 Step/Table1 (Out)
|
||||||
|
4 23 IOPort StepGen 5 Step/Table1 (Out)
|
||||||
|
17 24 IOPort StepGen 9 Dir/Table2 (Out)
|
||||||
|
5 25 IOPort StepGen 5 Dir/Table2 (Out)
|
||||||
|
6 26 IOPort StepGen 6 Step/Table1 (Out)
|
||||||
|
7 27 IOPort StepGen 6 Dir/Table2 (Out)
|
||||||
|
8 28 IOPort StepGen 7 Step/Table1 (Out)
|
||||||
|
9 29 IOPort StepGen 7 Dir/Table2 (Out)
|
||||||
|
10 30 IOPort None
|
||||||
|
11 31 IOPort QCount 1 Quad-A (In)
|
||||||
|
12 32 IOPort QCount 1 Quad-B (In)
|
||||||
|
13 33 IOPort QCount 1 Quad-IDX (In)
|
||||||
|
|
||||||
BIN
7i92t_7i76_7i74d.bin
Normal file
BIN
7i92t_7i76_7i74d.bin
Normal file
Binary file not shown.
126
7i92t_7i76_7i74d.pin
Normal file
126
7i92t_7i76_7i74d.pin
Normal file
@@ -0,0 +1,126 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 180.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: QCount
|
||||||
|
There are 1 of QCount in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 2 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 5 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
14 1 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
2 2 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
15 3 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
3 4 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
16 5 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
4 6 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
17 7 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
5 8 IOPort StepGen 4 Dir/Table2 (Out)
|
||||||
|
6 9 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
7 10 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
8 11 IOPort SSerial 0 RXData0 (In)
|
||||||
|
9 12 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
10 13 IOPort SSerial 0 RXData1 (In)
|
||||||
|
11 14 IOPort QCount 0 Quad-IDX (In)
|
||||||
|
12 15 IOPort QCount 0 Quad-B (In)
|
||||||
|
13 16 IOPort QCount 0 Quad-A (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort SSerial 1 RXData0 (In)
|
||||||
|
14 18 IOPort SSerial 1 RXData1 (In)
|
||||||
|
2 19 IOPort SSerial 1 RXData2 (In)
|
||||||
|
15 20 IOPort SSerial 1 RXData3 (In)
|
||||||
|
3 21 IOPort SSerial 1 TXData0 (Out)
|
||||||
|
16 22 IOPort SSerial 1 TXData1 (Out)
|
||||||
|
4 23 IOPort SSerial 1 TXData2 (Out)
|
||||||
|
17 24 IOPort SSerial 1 TXData3 (Out)
|
||||||
|
5 25 IOPort SSerial 1 RXData4 (In)
|
||||||
|
6 26 IOPort SSerial 1 RXData5 (In)
|
||||||
|
7 27 IOPort SSerial 1 RXData6 (In)
|
||||||
|
8 28 IOPort SSerial 1 RXData7 (In)
|
||||||
|
9 29 IOPort SSerial 1 TXData4 (Out)
|
||||||
|
10 30 IOPort SSerial 1 TXData5 (Out)
|
||||||
|
11 31 IOPort SSerial 1 TXData6 (Out)
|
||||||
|
12 32 IOPort SSerial 1 TXData7 (Out)
|
||||||
|
13 33 IOPort SSerial 1 TXEn7 (Out)
|
||||||
|
|
||||||
BIN
7i92t_7i76_7i85d.bin
Normal file
BIN
7i92t_7i76_7i85d.bin
Normal file
Binary file not shown.
135
7i92t_7i76_7i85d.pin
Normal file
135
7i92t_7i76_7i85d.pin
Normal file
@@ -0,0 +1,135 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 175.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCount
|
||||||
|
There are 6 of MuxedQCount in configuration
|
||||||
|
Version: 4
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3600
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCountSel
|
||||||
|
There are 1 of MuxedQCountSel in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 0
|
||||||
|
BaseAddress: 0000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 1 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 5 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2 -> 7I76
|
||||||
|
Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
TB2-4,5 0 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
TB2-2,3 1 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
TB2-10,11 2 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
TB2-8,9 3 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
TB2-16,17 4 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
TB2-14,15 5 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
TB2-22,23 6 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
TB2-20,21 7 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
TB3-4,5 8 IOPort StepGen 4 Dir/Table2 (Out)
|
||||||
|
TB3-2,3 9 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
Internal-Field-IO 10 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
Internal-Field-IO 11 IOPort SSerial 0 RXData0 (In)
|
||||||
|
TB3-18,19 12 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
TB3-16,17 13 IOPort SSerial 0 RXData1 (In)
|
||||||
|
TB3-13,14 14 IOPort MuxedQCount 2 MuxQ-IDX (In)
|
||||||
|
TB3-10,11 15 IOPort MuxedQCount 2 MuxQ-B (In)
|
||||||
|
TB3-7,8 16 IOPort MuxedQCount 2 MuxQ-A (In)
|
||||||
|
|
||||||
|
IO Connections for P1 -> 7I85
|
||||||
|
Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
TB1-19,20 17 IOPort SSerial 0 RXData6 (In)
|
||||||
|
TB1-21,22 18 IOPort SSerial 0 TXData6 (Out)
|
||||||
|
TB1-11,12 19 IOPort SSerial 0 RXData5 (In)
|
||||||
|
TB1-13,14 20 IOPort SSerial 0 TXData5 (Out)
|
||||||
|
TB1-3,4 21 IOPort SSerial 0 RXData4 (In)
|
||||||
|
TB1-5,6 22 IOPort SSerial 0 TXData4 (Out)
|
||||||
|
TB2-19,20 23 IOPort SSerial 0 RXData3 (In)
|
||||||
|
TB2-21,22 24 IOPort SSerial 0 TXData3 (Out)
|
||||||
|
TB2-11,12 25 IOPort SSerial 0 RXData2 (In)
|
||||||
|
TB2-13,14 26 IOPort SSerial 0 TXData2 (Out)
|
||||||
|
Internal-EncMux 27 IOPort MuxedQCountSel 0 MuxSel0 (Out)
|
||||||
|
TB3-1,2,9,10 28 IOPort MuxedQCount 0 MuxQ-A (In)
|
||||||
|
TB3-4,5,12,13 29 IOPort MuxedQCount 0 MuxQ-B (In)
|
||||||
|
TB3-7,8,12,13 30 IOPort MuxedQCount 0 MuxQ-IDX (In)
|
||||||
|
TB3-17,18,TB2-1,2 31 IOPort MuxedQCount 1 MuxQ-A (In)
|
||||||
|
TB3-20,21,TB2-4,5 32 IOPort MuxedQCount 1 MuxQ-B (In)
|
||||||
|
TB3-23,24,TB2-7,8 33 IOPort MuxedQCount 1 MuxQ-IDX (In)
|
||||||
|
|
||||||
BIN
7i92t_7i76_7i85sd.bin
Normal file
BIN
7i92t_7i76_7i85sd.bin
Normal file
Binary file not shown.
135
7i92t_7i76_7i85sd.pin
Normal file
135
7i92t_7i76_7i85sd.pin
Normal file
@@ -0,0 +1,135 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 175.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCount
|
||||||
|
There are 6 of MuxedQCount in configuration
|
||||||
|
Version: 4
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3600
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCountSel
|
||||||
|
There are 1 of MuxedQCountSel in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 0
|
||||||
|
BaseAddress: 0000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 1 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 9 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
14 1 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
2 2 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
15 3 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
3 4 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
16 5 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
4 6 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
17 7 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
5 8 IOPort StepGen 4 Dir/Table2 (Out)
|
||||||
|
6 9 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
7 10 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
8 11 IOPort SSerial 0 RXData0 (In)
|
||||||
|
9 12 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
10 13 IOPort SSerial 0 RXData1 (In)
|
||||||
|
11 14 IOPort MuxedQCount 2 MuxQ-IDX (In)
|
||||||
|
12 15 IOPort MuxedQCount 2 MuxQ-B (In)
|
||||||
|
13 16 IOPort MuxedQCount 2 MuxQ-A (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort SSerial 0 RXData2 (In)
|
||||||
|
14 18 IOPort SSerial 0 TXData2 (Out)
|
||||||
|
2 19 IOPort StepGen 8 Step/Table1 (Out)
|
||||||
|
15 20 IOPort StepGen 8 Dir/Table2 (Out)
|
||||||
|
3 21 IOPort StepGen 7 Step/Table1 (Out)
|
||||||
|
16 22 IOPort StepGen 7 Dir/Table2 (Out)
|
||||||
|
4 23 IOPort StepGen 6 Step/Table1 (Out)
|
||||||
|
17 24 IOPort StepGen 6 Dir/Table2 (Out)
|
||||||
|
5 25 IOPort StepGen 5 Step/Table1 (Out)
|
||||||
|
6 26 IOPort StepGen 5 Dir/Table2 (Out)
|
||||||
|
7 27 IOPort MuxedQCountSel 0 MuxSel0 (Out)
|
||||||
|
8 28 IOPort MuxedQCount 0 MuxQ-A (In)
|
||||||
|
9 29 IOPort MuxedQCount 0 MuxQ-B (In)
|
||||||
|
10 30 IOPort MuxedQCount 0 MuxQ-IDX (In)
|
||||||
|
11 31 IOPort MuxedQCount 1 MuxQ-A (In)
|
||||||
|
12 32 IOPort MuxedQCount 1 MuxQ-B (In)
|
||||||
|
13 33 IOPort MuxedQCount 1 MuxQ-IDX (In)
|
||||||
|
|
||||||
BIN
7i92t_7i76_7i89d.bin
Normal file
BIN
7i92t_7i76_7i89d.bin
Normal file
Binary file not shown.
BIN
7i92t_7i76_g540d.bin
Normal file
BIN
7i92t_7i76_g540d.bin
Normal file
Binary file not shown.
135
7i92t_7i76_g540d.pin
Normal file
135
7i92t_7i76_g540d.pin
Normal file
@@ -0,0 +1,135 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 175.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: PWM
|
||||||
|
There are 1 of PWM in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 4100
|
||||||
|
ClockFrequency: 175.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: QCount
|
||||||
|
There are 2 of QCount in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 1 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 10 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
14 1 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
2 2 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
15 3 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
3 4 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
16 5 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
4 6 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
17 7 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
5 8 IOPort StepGen 4 Dir/Table2 (Out)
|
||||||
|
6 9 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
7 10 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
8 11 IOPort SSerial 0 RXData0 (In)
|
||||||
|
9 12 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
10 13 IOPort SSerial 0 RXData1 (In)
|
||||||
|
11 14 IOPort QCount 0 Quad-IDX (In)
|
||||||
|
12 15 IOPort QCount 0 Quad-B (In)
|
||||||
|
13 16 IOPort QCount 0 Quad-A (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort None
|
||||||
|
14 18 IOPort PWM 0 PWM (Out)
|
||||||
|
2 19 IOPort StepGen 5 Step/Table1 (Out)
|
||||||
|
15 20 IOPort None
|
||||||
|
3 21 IOPort StepGen 5 Dir/Table2 (Out)
|
||||||
|
16 22 IOPort StepGen 9 Step/Table1 (Out)
|
||||||
|
4 23 IOPort StepGen 6 Step/Table1 (Out)
|
||||||
|
17 24 IOPort None
|
||||||
|
5 25 IOPort StepGen 6 Dir/Table2 (Out)
|
||||||
|
6 26 IOPort StepGen 7 Step/Table1 (Out)
|
||||||
|
7 27 IOPort StepGen 7 Dir/Table2 (Out)
|
||||||
|
8 28 IOPort StepGen 8 Step/Table1 (Out)
|
||||||
|
9 29 IOPort StepGen 8 Dir/Table2 (Out)
|
||||||
|
10 30 IOPort QCount 1 Quad-A (In)
|
||||||
|
11 31 IOPort QCount 1 Quad-B (In)
|
||||||
|
12 32 IOPort QCount 1 Quad-IDX (In)
|
||||||
|
13 33 IOPort None
|
||||||
|
|
||||||
BIN
7i92t_7i76x1pd.bin
Normal file
BIN
7i92t_7i76x1pd.bin
Normal file
Binary file not shown.
135
7i92t_7i76x1pd.pin
Normal file
135
7i92t_7i76x1pd.pin
Normal file
@@ -0,0 +1,135 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 175.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: PWM
|
||||||
|
There are 1 of PWM in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 4100
|
||||||
|
ClockFrequency: 175.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 4 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: QCount
|
||||||
|
There are 1 of QCount in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 1 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
14 1 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
2 2 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
15 3 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
3 4 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
16 5 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
4 6 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
17 7 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
5 8 IOPort None
|
||||||
|
6 9 IOPort PWM 0 PWM (Out)
|
||||||
|
7 10 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
8 11 IOPort SSerial 0 RXData0 (In)
|
||||||
|
9 12 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
10 13 IOPort SSerial 0 RXData1 (In)
|
||||||
|
11 14 IOPort QCount 0 Quad-IDX (In)
|
||||||
|
12 15 IOPort QCount 0 Quad-B (In)
|
||||||
|
13 16 IOPort QCount 0 Quad-A (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort None
|
||||||
|
14 18 IOPort None
|
||||||
|
2 19 IOPort None
|
||||||
|
15 20 IOPort None
|
||||||
|
3 21 IOPort None
|
||||||
|
16 22 IOPort None
|
||||||
|
4 23 IOPort None
|
||||||
|
17 24 IOPort None
|
||||||
|
5 25 IOPort None
|
||||||
|
6 26 IOPort None
|
||||||
|
7 27 IOPort None
|
||||||
|
8 28 IOPort None
|
||||||
|
9 29 IOPort None
|
||||||
|
10 30 IOPort None
|
||||||
|
11 31 IOPort None
|
||||||
|
12 32 IOPort None
|
||||||
|
13 33 IOPort None
|
||||||
|
|
||||||
BIN
7i92t_7i76x2d.bin
Normal file
BIN
7i92t_7i76x2d.bin
Normal file
Binary file not shown.
126
7i92t_7i76x2d.pin
Normal file
126
7i92t_7i76x2d.pin
Normal file
@@ -0,0 +1,126 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 180.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: QCount
|
||||||
|
There are 2 of QCount in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 1 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 10 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
14 1 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
2 2 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
15 3 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
3 4 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
16 5 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
4 6 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
17 7 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
5 8 IOPort StepGen 4 Dir/Table2 (Out)
|
||||||
|
6 9 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
7 10 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
8 11 IOPort SSerial 0 RXData0 (In)
|
||||||
|
9 12 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
10 13 IOPort SSerial 0 RXData1 (In)
|
||||||
|
11 14 IOPort QCount 0 Quad-IDX (In)
|
||||||
|
12 15 IOPort QCount 0 Quad-B (In)
|
||||||
|
13 16 IOPort QCount 0 Quad-A (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort StepGen 5 Dir/Table2 (Out)
|
||||||
|
14 18 IOPort StepGen 5 Step/Table1 (Out)
|
||||||
|
2 19 IOPort StepGen 6 Dir/Table2 (Out)
|
||||||
|
15 20 IOPort StepGen 6 Step/Table1 (Out)
|
||||||
|
3 21 IOPort StepGen 7 Dir/Table2 (Out)
|
||||||
|
16 22 IOPort StepGen 7 Step/Table1 (Out)
|
||||||
|
4 23 IOPort StepGen 8 Dir/Table2 (Out)
|
||||||
|
17 24 IOPort StepGen 8 Step/Table1 (Out)
|
||||||
|
5 25 IOPort StepGen 9 Dir/Table2 (Out)
|
||||||
|
6 26 IOPort StepGen 9 Step/Table1 (Out)
|
||||||
|
7 27 IOPort SSerial 0 TXData2 (Out)
|
||||||
|
8 28 IOPort SSerial 0 RXData2 (In)
|
||||||
|
9 29 IOPort SSerial 0 TXData3 (Out)
|
||||||
|
10 30 IOPort SSerial 0 RXData3 (In)
|
||||||
|
11 31 IOPort QCount 1 Quad-IDX (In)
|
||||||
|
12 32 IOPort QCount 1 Quad-B (In)
|
||||||
|
13 33 IOPort QCount 1 Quad-A (In)
|
||||||
|
|
||||||
BIN
7i92t_7i77_5abobd.bin
Normal file
BIN
7i92t_7i77_5abobd.bin
Normal file
Binary file not shown.
BIN
7i92t_7i77_7i74d.bin
Normal file
BIN
7i92t_7i77_7i74d.bin
Normal file
Binary file not shown.
126
7i92t_7i77_7i74d.pin
Normal file
126
7i92t_7i77_7i74d.pin
Normal file
@@ -0,0 +1,126 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 180.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCount
|
||||||
|
There are 6 of MuxedQCount in configuration
|
||||||
|
Version: 4
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3600
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCountSel
|
||||||
|
There are 1 of MuxedQCountSel in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 0
|
||||||
|
BaseAddress: 0000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 2 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort SSerial 0 TXEn2 (Out)
|
||||||
|
14 1 IOPort SSerial 0 TXData2 (Out)
|
||||||
|
2 2 IOPort SSerial 0 RXData2 (In)
|
||||||
|
15 3 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
3 4 IOPort SSerial 0 RXData1 (In)
|
||||||
|
16 5 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
4 6 IOPort SSerial 0 RXData0 (In)
|
||||||
|
17 7 IOPort MuxedQCountSel 0 MuxSel0 (Out)
|
||||||
|
5 8 IOPort MuxedQCount 0 MuxQ-A (In)
|
||||||
|
6 9 IOPort MuxedQCount 0 MuxQ-B (In)
|
||||||
|
7 10 IOPort MuxedQCount 0 MuxQ-IDX (In)
|
||||||
|
8 11 IOPort MuxedQCount 1 MuxQ-A (In)
|
||||||
|
9 12 IOPort MuxedQCount 1 MuxQ-B (In)
|
||||||
|
10 13 IOPort MuxedQCount 1 MuxQ-IDX (In)
|
||||||
|
11 14 IOPort MuxedQCount 2 MuxQ-A (In)
|
||||||
|
12 15 IOPort MuxedQCount 2 MuxQ-B (In)
|
||||||
|
13 16 IOPort MuxedQCount 2 MuxQ-IDX (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort SSerial 1 RXData0 (In)
|
||||||
|
14 18 IOPort SSerial 1 RXData1 (In)
|
||||||
|
2 19 IOPort SSerial 1 RXData2 (In)
|
||||||
|
15 20 IOPort SSerial 1 RXData3 (In)
|
||||||
|
3 21 IOPort SSerial 1 TXData0 (Out)
|
||||||
|
16 22 IOPort SSerial 1 TXData1 (Out)
|
||||||
|
4 23 IOPort SSerial 1 TXData2 (Out)
|
||||||
|
17 24 IOPort SSerial 1 TXData3 (Out)
|
||||||
|
5 25 IOPort SSerial 1 RXData4 (In)
|
||||||
|
6 26 IOPort SSerial 1 RXData5 (In)
|
||||||
|
7 27 IOPort SSerial 1 RXData6 (In)
|
||||||
|
8 28 IOPort SSerial 1 RXData7 (In)
|
||||||
|
9 29 IOPort SSerial 1 TXData4 (Out)
|
||||||
|
10 30 IOPort SSerial 1 TXData5 (Out)
|
||||||
|
11 31 IOPort SSerial 1 TXData6 (Out)
|
||||||
|
12 32 IOPort SSerial 1 TXData7 (Out)
|
||||||
|
13 33 IOPort SSerial 1 TXEn7 (Out)
|
||||||
|
|
||||||
BIN
7i92t_7i77_7i761pd.bin
Normal file
BIN
7i92t_7i77_7i761pd.bin
Normal file
Binary file not shown.
144
7i92t_7i77_7i761pd.pin
Normal file
144
7i92t_7i77_7i761pd.pin
Normal file
@@ -0,0 +1,144 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 180.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCount
|
||||||
|
There are 8 of MuxedQCount in configuration
|
||||||
|
Version: 4
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3600
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCountSel
|
||||||
|
There are 1 of MuxedQCountSel in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 0
|
||||||
|
BaseAddress: 0000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: PWM
|
||||||
|
There are 1 of PWM in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 4100
|
||||||
|
ClockFrequency: 180.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 1 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 4 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2 -> 7I77
|
||||||
|
Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
Internal-TXEn 0 IOPort SSerial 0 TXEn2 (Out)
|
||||||
|
TB6-5,6 1 IOPort SSerial 0 TXData2 (Out)
|
||||||
|
TB6-3,4 2 IOPort SSerial 0 RXData2 (In)
|
||||||
|
Internal-Analog-IO 3 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
Internal-Analog-IO 4 IOPort SSerial 0 RXData1 (In)
|
||||||
|
Internal-Field-IO 5 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
Internal-Field-IO 6 IOPort SSerial 0 RXData0 (In)
|
||||||
|
Internal-EncMux 7 IOPort MuxedQCountSel 0 MuxSel0 (Out)
|
||||||
|
TB3-1,2,9,10 8 IOPort MuxedQCount 0 MuxQ-A (In)
|
||||||
|
TB3-4,5,12,13 9 IOPort MuxedQCount 0 MuxQ-B (In)
|
||||||
|
TB3-7,8,15,16 10 IOPort MuxedQCount 0 MuxQ-IDX (In)
|
||||||
|
TB3-17,18,TB4-1,2 11 IOPort MuxedQCount 1 MuxQ-A (In)
|
||||||
|
TB3-20,21,TB4-4,5 12 IOPort MuxedQCount 1 MuxQ-B (In)
|
||||||
|
TB3-23,24,TB4-7,8 13 IOPort MuxedQCount 1 MuxQ-IDX (In)
|
||||||
|
TB4-9,10,17,18 14 IOPort MuxedQCount 2 MuxQ-A (In)
|
||||||
|
TB4-12,13,20,21 15 IOPort MuxedQCount 2 MuxQ-B (In)
|
||||||
|
TB4-15,16,23,24 16 IOPort MuxedQCount 2 MuxQ-IDX (In)
|
||||||
|
|
||||||
|
IO Connections for P1 -> 7I76
|
||||||
|
Pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
TB2-4,5 17 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
TB2-2,3 18 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
TB2-10,11 19 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
TB2-8,9 20 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
TB2-16,17 21 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
TB2-14,15 22 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
TB2-22,23 23 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
TB2-20,21 24 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
TB3-4,5 25 IOPort PWM 0 PWM (Out)
|
||||||
|
TB3-2,3 26 IOPort None
|
||||||
|
Internal-Field-IO 27 IOPort SSerial 0 TXData3 (Out)
|
||||||
|
Internal-Field-IO 28 IOPort SSerial 0 RXData3 (In)
|
||||||
|
TB3-18,19 29 IOPort SSerial 0 TXData4 (Out)
|
||||||
|
TB3-16,17 30 IOPort SSerial 0 RXData4 (In)
|
||||||
|
TB3-13,14 31 IOPort MuxedQCount 3 MuxQ-IDX (In)
|
||||||
|
TB3-10,11 32 IOPort MuxedQCount 3 MuxQ-B (In)
|
||||||
|
TB3-7,8 33 IOPort MuxedQCount 3 MuxQ-A (In)
|
||||||
|
|
||||||
BIN
7i92t_7i77_7i76d.bin
Normal file
BIN
7i92t_7i77_7i76d.bin
Normal file
Binary file not shown.
135
7i92t_7i77_7i76d.pin
Normal file
135
7i92t_7i77_7i76d.pin
Normal file
@@ -0,0 +1,135 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 180.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCount
|
||||||
|
There are 8 of MuxedQCount in configuration
|
||||||
|
Version: 4
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3600
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCountSel
|
||||||
|
There are 1 of MuxedQCountSel in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 0
|
||||||
|
BaseAddress: 0000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 1 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 5 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort SSerial 0 TXEn2 (Out)
|
||||||
|
14 1 IOPort SSerial 0 TXData2 (Out)
|
||||||
|
2 2 IOPort SSerial 0 RXData2 (In)
|
||||||
|
15 3 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
3 4 IOPort SSerial 0 RXData1 (In)
|
||||||
|
16 5 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
4 6 IOPort SSerial 0 RXData0 (In)
|
||||||
|
17 7 IOPort MuxedQCountSel 0 MuxSel0 (Out)
|
||||||
|
5 8 IOPort MuxedQCount 0 MuxQ-A (In)
|
||||||
|
6 9 IOPort MuxedQCount 0 MuxQ-B (In)
|
||||||
|
7 10 IOPort MuxedQCount 0 MuxQ-IDX (In)
|
||||||
|
8 11 IOPort MuxedQCount 1 MuxQ-A (In)
|
||||||
|
9 12 IOPort MuxedQCount 1 MuxQ-B (In)
|
||||||
|
10 13 IOPort MuxedQCount 1 MuxQ-IDX (In)
|
||||||
|
11 14 IOPort MuxedQCount 2 MuxQ-A (In)
|
||||||
|
12 15 IOPort MuxedQCount 2 MuxQ-B (In)
|
||||||
|
13 16 IOPort MuxedQCount 2 MuxQ-IDX (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
14 18 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
2 19 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
15 20 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
3 21 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
16 22 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
4 23 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
17 24 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
5 25 IOPort StepGen 4 Dir/Table2 (Out)
|
||||||
|
6 26 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
7 27 IOPort SSerial 0 TXData3 (Out)
|
||||||
|
8 28 IOPort SSerial 0 RXData3 (In)
|
||||||
|
9 29 IOPort SSerial 0 TXData4 (Out)
|
||||||
|
10 30 IOPort SSerial 0 RXData4 (In)
|
||||||
|
11 31 IOPort MuxedQCount 3 MuxQ-IDX (In)
|
||||||
|
12 32 IOPort MuxedQCount 3 MuxQ-B (In)
|
||||||
|
13 33 IOPort MuxedQCount 3 MuxQ-A (In)
|
||||||
|
|
||||||
BIN
7i92t_7i77_7i85d.bin
Normal file
BIN
7i92t_7i77_7i85d.bin
Normal file
Binary file not shown.
BIN
7i92t_7i77_7i89d.bin
Normal file
BIN
7i92t_7i77_7i89d.bin
Normal file
Binary file not shown.
BIN
7i92t_7i77x2d.bin
Normal file
BIN
7i92t_7i77x2d.bin
Normal file
Binary file not shown.
126
7i92t_7i77x2d.pin
Normal file
126
7i92t_7i77x2d.pin
Normal file
@@ -0,0 +1,126 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 180.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCount
|
||||||
|
There are 12 of MuxedQCount in configuration
|
||||||
|
Version: 4
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3600
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCountSel
|
||||||
|
There are 1 of MuxedQCountSel in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 0
|
||||||
|
BaseAddress: 0000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 1 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort SSerial 0 TXEn2 (Out)
|
||||||
|
14 1 IOPort SSerial 0 TXData2 (Out)
|
||||||
|
2 2 IOPort SSerial 0 RXData2 (In)
|
||||||
|
15 3 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
3 4 IOPort SSerial 0 RXData1 (In)
|
||||||
|
16 5 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
4 6 IOPort SSerial 0 RXData0 (In)
|
||||||
|
17 7 IOPort MuxedQCountSel 0 MuxSel0 (Out)
|
||||||
|
5 8 IOPort MuxedQCount 0 MuxQ-A (In)
|
||||||
|
6 9 IOPort MuxedQCount 0 MuxQ-B (In)
|
||||||
|
7 10 IOPort MuxedQCount 0 MuxQ-IDX (In)
|
||||||
|
8 11 IOPort MuxedQCount 1 MuxQ-A (In)
|
||||||
|
9 12 IOPort MuxedQCount 1 MuxQ-B (In)
|
||||||
|
10 13 IOPort MuxedQCount 1 MuxQ-IDX (In)
|
||||||
|
11 14 IOPort MuxedQCount 2 MuxQ-A (In)
|
||||||
|
12 15 IOPort MuxedQCount 2 MuxQ-B (In)
|
||||||
|
13 16 IOPort MuxedQCount 2 MuxQ-IDX (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort SSerial 0 TXEn5 (Out)
|
||||||
|
14 18 IOPort SSerial 0 TXData5 (Out)
|
||||||
|
2 19 IOPort SSerial 0 RXData5 (In)
|
||||||
|
15 20 IOPort SSerial 0 TXData4 (Out)
|
||||||
|
3 21 IOPort SSerial 0 RXData4 (In)
|
||||||
|
16 22 IOPort SSerial 0 TXData3 (Out)
|
||||||
|
4 23 IOPort SSerial 0 RXData3 (In)
|
||||||
|
17 24 IOPort MuxedQCountSel 6 MuxSel0 (Out)
|
||||||
|
5 25 IOPort MuxedQCount 3 MuxQ-A (In)
|
||||||
|
6 26 IOPort MuxedQCount 3 MuxQ-B (In)
|
||||||
|
7 27 IOPort MuxedQCount 3 MuxQ-IDX (In)
|
||||||
|
8 28 IOPort MuxedQCount 4 MuxQ-A (In)
|
||||||
|
9 29 IOPort MuxedQCount 4 MuxQ-B (In)
|
||||||
|
10 30 IOPort MuxedQCount 4 MuxQ-IDX (In)
|
||||||
|
11 31 IOPort MuxedQCount 5 MuxQ-A (In)
|
||||||
|
12 32 IOPort MuxedQCount 5 MuxQ-B (In)
|
||||||
|
13 33 IOPort MuxedQCount 5 MuxQ-IDX (In)
|
||||||
|
|
||||||
BIN
7i92t_7i78x2d.bin
Normal file
BIN
7i92t_7i78x2d.bin
Normal file
Binary file not shown.
135
7i92t_7i78x2d.pin
Normal file
135
7i92t_7i78x2d.pin
Normal file
@@ -0,0 +1,135 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 180.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: QCount
|
||||||
|
There are 2 of QCount in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 1 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: PWM
|
||||||
|
There are 2 of PWM in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 4100
|
||||||
|
ClockFrequency: 180.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 8 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
14 1 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
2 2 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
15 3 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
3 4 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
16 5 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
4 6 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
17 7 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
5 8 IOPort PWM 0 PWM (Out)
|
||||||
|
6 9 IOPort PWM 0 /Enable (Out)
|
||||||
|
7 10 IOPort PWM 0 Dir (Out)
|
||||||
|
8 11 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
9 12 IOPort SSerial 0 TXEn0 (Out)
|
||||||
|
10 13 IOPort SSerial 0 RXData0 (In)
|
||||||
|
11 14 IOPort QCount 0 Quad-IDX (In)
|
||||||
|
12 15 IOPort QCount 0 Quad-B (In)
|
||||||
|
13 16 IOPort QCount 0 Quad-A (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort StepGen 4 Dir/Table2 (Out)
|
||||||
|
14 18 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
2 19 IOPort StepGen 5 Dir/Table2 (Out)
|
||||||
|
15 20 IOPort StepGen 5 Step/Table1 (Out)
|
||||||
|
3 21 IOPort StepGen 6 Dir/Table2 (Out)
|
||||||
|
16 22 IOPort StepGen 6 Step/Table1 (Out)
|
||||||
|
4 23 IOPort StepGen 7 Dir/Table2 (Out)
|
||||||
|
17 24 IOPort StepGen 7 Step/Table1 (Out)
|
||||||
|
5 25 IOPort PWM 1 PWM (Out)
|
||||||
|
6 26 IOPort PWM 1 /Enable (Out)
|
||||||
|
7 27 IOPort PWM 1 Dir (Out)
|
||||||
|
8 28 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
9 29 IOPort SSerial 0 TXEn1 (Out)
|
||||||
|
10 30 IOPort SSerial 0 RXData1 (In)
|
||||||
|
11 31 IOPort QCount 1 Quad-IDX (In)
|
||||||
|
12 32 IOPort QCount 1 Quad-B (In)
|
||||||
|
13 33 IOPort QCount 1 Quad-A (In)
|
||||||
|
|
||||||
BIN
7i92t_7i85_g540d.bin
Normal file
BIN
7i92t_7i85_g540d.bin
Normal file
Binary file not shown.
144
7i92t_7i85_g540d.pin
Normal file
144
7i92t_7i85_g540d.pin
Normal file
@@ -0,0 +1,144 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 175.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCount
|
||||||
|
There are 4 of MuxedQCount in configuration
|
||||||
|
Version: 4
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3600
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCountSel
|
||||||
|
There are 1 of MuxedQCountSel in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 0
|
||||||
|
BaseAddress: 0000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 1 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 5 of StepGen in configuration
|
||||||
|
Version: 194
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: PWM
|
||||||
|
There are 1 of PWM in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 4100
|
||||||
|
ClockFrequency: 175.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort SSerial 0 RXData4 (In)
|
||||||
|
14 1 IOPort SSerial 0 TXData4 (Out)
|
||||||
|
2 2 IOPort SSerial 0 RXData3 (In)
|
||||||
|
15 3 IOPort SSerial 0 TXData3 (Out)
|
||||||
|
3 4 IOPort SSerial 0 RXData2 (In)
|
||||||
|
16 5 IOPort SSerial 0 TXData2 (Out)
|
||||||
|
4 6 IOPort SSerial 0 RXData1 (In)
|
||||||
|
17 7 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
5 8 IOPort SSerial 0 RXData0 (In)
|
||||||
|
6 9 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
7 10 IOPort MuxedQCountSel 0 MuxSel0 (Out)
|
||||||
|
8 11 IOPort MuxedQCount 0 MuxQ-A (In)
|
||||||
|
9 12 IOPort MuxedQCount 0 MuxQ-B (In)
|
||||||
|
10 13 IOPort MuxedQCount 0 Shared-IDX (In)
|
||||||
|
11 14 IOPort MuxedQCount 1 MuxQ-A (In)
|
||||||
|
12 15 IOPort MuxedQCount 1 MuxQ-B (In)
|
||||||
|
13 16 IOPort MuxedQCount 1 Shared-IDX (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort None
|
||||||
|
14 18 IOPort PWM 0 PWM (Out)
|
||||||
|
2 19 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
15 20 IOPort None
|
||||||
|
3 21 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
16 22 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
4 23 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
17 24 IOPort None
|
||||||
|
5 25 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
6 26 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
7 27 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
8 28 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
9 29 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
10 30 IOPort None
|
||||||
|
11 31 IOPort None
|
||||||
|
12 32 IOPort None
|
||||||
|
13 33 IOPort None
|
||||||
|
|
||||||
BIN
7i92t_7i85s_4pwm.bin
Normal file
BIN
7i92t_7i85s_4pwm.bin
Normal file
Binary file not shown.
135
7i92t_7i85s_4pwm.pin
Normal file
135
7i92t_7i85s_4pwm.pin
Normal file
@@ -0,0 +1,135 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 175.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCount
|
||||||
|
There are 4 of MuxedQCount in configuration
|
||||||
|
Version: 4
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3600
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCountSel
|
||||||
|
There are 1 of MuxedQCountSel in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 0
|
||||||
|
BaseAddress: 0000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: PWM
|
||||||
|
There are 4 of PWM in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 4100
|
||||||
|
ClockFrequency: 175.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 1 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort SSerial 0 RXData0 (In)
|
||||||
|
14 1 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
2 2 IOPort PWM 3 PWM (Out)
|
||||||
|
15 3 IOPort PWM 3 Dir (Out)
|
||||||
|
3 4 IOPort PWM 2 PWM (Out)
|
||||||
|
16 5 IOPort PWM 2 Dir (Out)
|
||||||
|
4 6 IOPort PWM 1 PWM (Out)
|
||||||
|
17 7 IOPort PWM 1 Dir (Out)
|
||||||
|
5 8 IOPort PWM 0 PWM (Out)
|
||||||
|
6 9 IOPort PWM 0 Dir (Out)
|
||||||
|
7 10 IOPort MuxedQCountSel 0 MuxSel0 (Out)
|
||||||
|
8 11 IOPort MuxedQCount 0 MuxQ-A (In)
|
||||||
|
9 12 IOPort MuxedQCount 0 MuxQ-B (In)
|
||||||
|
10 13 IOPort MuxedQCount 0 MuxQ-IDX (In)
|
||||||
|
11 14 IOPort MuxedQCount 1 MuxQ-A (In)
|
||||||
|
12 15 IOPort MuxedQCount 1 MuxQ-B (In)
|
||||||
|
13 16 IOPort MuxedQCount 1 MuxQ-IDX (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort None
|
||||||
|
14 18 IOPort None
|
||||||
|
2 19 IOPort None
|
||||||
|
15 20 IOPort None
|
||||||
|
3 21 IOPort None
|
||||||
|
16 22 IOPort None
|
||||||
|
4 23 IOPort None
|
||||||
|
17 24 IOPort None
|
||||||
|
5 25 IOPort None
|
||||||
|
6 26 IOPort None
|
||||||
|
7 27 IOPort None
|
||||||
|
8 28 IOPort None
|
||||||
|
9 29 IOPort None
|
||||||
|
10 30 IOPort None
|
||||||
|
11 31 IOPort None
|
||||||
|
12 32 IOPort None
|
||||||
|
13 33 IOPort None
|
||||||
|
|
||||||
BIN
7i92t_7i85s_5abobd.bin
Normal file
BIN
7i92t_7i85s_5abobd.bin
Normal file
Binary file not shown.
144
7i92t_7i85s_5abobd.pin
Normal file
144
7i92t_7i85s_5abobd.pin
Normal file
@@ -0,0 +1,144 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 180.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCount
|
||||||
|
There are 4 of MuxedQCount in configuration
|
||||||
|
Version: 4
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3600
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCountSel
|
||||||
|
There are 1 of MuxedQCountSel in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 0
|
||||||
|
BaseAddress: 0000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: PWM
|
||||||
|
There are 1 of PWM in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 4100
|
||||||
|
ClockFrequency: 180.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 1 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 9 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort SSerial 0 RXData0 (In)
|
||||||
|
14 1 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
2 2 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
15 3 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
3 4 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
16 5 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
4 6 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
17 7 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
5 8 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
6 9 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
7 10 IOPort MuxedQCountSel 0 MuxSel0 (Out)
|
||||||
|
8 11 IOPort MuxedQCount 0 MuxQ-A (In)
|
||||||
|
9 12 IOPort MuxedQCount 0 MuxQ-B (In)
|
||||||
|
10 13 IOPort MuxedQCount 0 MuxQ-IDX (In)
|
||||||
|
11 14 IOPort MuxedQCount 1 MuxQ-A (In)
|
||||||
|
12 15 IOPort MuxedQCount 1 MuxQ-B (In)
|
||||||
|
13 16 IOPort MuxedQCount 1 MuxQ-IDX (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort PWM 0 PWM (Out)
|
||||||
|
14 18 IOPort None
|
||||||
|
2 19 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
15 20 IOPort None
|
||||||
|
3 21 IOPort StepGen 4 Dir/Table2 (Out)
|
||||||
|
16 22 IOPort StepGen 8 Step/Table1 (Out)
|
||||||
|
4 23 IOPort StepGen 5 Step/Table1 (Out)
|
||||||
|
17 24 IOPort StepGen 8 Dir/Table2 (Out)
|
||||||
|
5 25 IOPort StepGen 5 Dir/Table2 (Out)
|
||||||
|
6 26 IOPort StepGen 6 Step/Table1 (Out)
|
||||||
|
7 27 IOPort StepGen 6 Dir/Table2 (Out)
|
||||||
|
8 28 IOPort StepGen 7 Step/Table1 (Out)
|
||||||
|
9 29 IOPort StepGen 7 Dir/Table2 (Out)
|
||||||
|
10 30 IOPort None
|
||||||
|
11 31 IOPort None
|
||||||
|
12 32 IOPort None
|
||||||
|
13 33 IOPort None
|
||||||
|
|
||||||
BIN
7i92t_7i85sx2d.bin
Normal file
BIN
7i92t_7i85sx2d.bin
Normal file
Binary file not shown.
135
7i92t_7i85sx2d.pin
Normal file
135
7i92t_7i85sx2d.pin
Normal file
@@ -0,0 +1,135 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 180.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCount
|
||||||
|
There are 8 of MuxedQCount in configuration
|
||||||
|
Version: 4
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3600
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCountSel
|
||||||
|
There are 1 of MuxedQCountSel in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 0
|
||||||
|
BaseAddress: 0000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 1 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 8 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort SSerial 0 RXData0 (In)
|
||||||
|
14 1 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
2 2 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
15 3 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
3 4 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
16 5 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
4 6 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
17 7 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
5 8 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
6 9 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
7 10 IOPort MuxedQCountSel 0 MuxSel0 (Out)
|
||||||
|
8 11 IOPort MuxedQCount 0 MuxQ-A (In)
|
||||||
|
9 12 IOPort MuxedQCount 0 MuxQ-B (In)
|
||||||
|
10 13 IOPort MuxedQCount 0 MuxQ-IDX (In)
|
||||||
|
11 14 IOPort MuxedQCount 1 MuxQ-A (In)
|
||||||
|
12 15 IOPort MuxedQCount 1 MuxQ-B (In)
|
||||||
|
13 16 IOPort MuxedQCount 1 MuxQ-IDX (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort SSerial 0 RXData1 (In)
|
||||||
|
14 18 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
2 19 IOPort StepGen 7 Step/Table1 (Out)
|
||||||
|
15 20 IOPort StepGen 7 Dir/Table2 (Out)
|
||||||
|
3 21 IOPort StepGen 6 Step/Table1 (Out)
|
||||||
|
16 22 IOPort StepGen 6 Dir/Table2 (Out)
|
||||||
|
4 23 IOPort StepGen 5 Step/Table1 (Out)
|
||||||
|
17 24 IOPort StepGen 5 Dir/Table2 (Out)
|
||||||
|
5 25 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
6 26 IOPort StepGen 4 Dir/Table2 (Out)
|
||||||
|
7 27 IOPort MuxedQCountSel 4 MuxSel0 (Out)
|
||||||
|
8 28 IOPort MuxedQCount 2 MuxQ-A (In)
|
||||||
|
9 29 IOPort MuxedQCount 2 MuxQ-B (In)
|
||||||
|
10 30 IOPort MuxedQCount 2 MuxQ-IDX (In)
|
||||||
|
11 31 IOPort MuxedQCount 3 MuxQ-A (In)
|
||||||
|
12 32 IOPort MuxedQCount 3 MuxQ-B (In)
|
||||||
|
13 33 IOPort MuxedQCount 3 MuxQ-IDX (In)
|
||||||
|
|
||||||
BIN
7i92t_7i85x2d.bin
Normal file
BIN
7i92t_7i85x2d.bin
Normal file
Binary file not shown.
126
7i92t_7i85x2d.pin
Normal file
126
7i92t_7i85x2d.pin
Normal file
@@ -0,0 +1,126 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 180.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCount
|
||||||
|
There are 8 of MuxedQCount in configuration
|
||||||
|
Version: 4
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3600
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: MuxedQCountSel
|
||||||
|
There are 1 of MuxedQCountSel in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 0
|
||||||
|
BaseAddress: 0000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 2 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort SSerial 0 RXData4 (In)
|
||||||
|
14 1 IOPort SSerial 0 TXData4 (Out)
|
||||||
|
2 2 IOPort SSerial 0 RXData3 (In)
|
||||||
|
15 3 IOPort SSerial 0 TXData3 (Out)
|
||||||
|
3 4 IOPort SSerial 0 RXData2 (In)
|
||||||
|
16 5 IOPort SSerial 0 TXData2 (Out)
|
||||||
|
4 6 IOPort SSerial 0 RXData1 (In)
|
||||||
|
17 7 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
5 8 IOPort SSerial 0 RXData0 (In)
|
||||||
|
6 9 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
7 10 IOPort MuxedQCountSel 0 MuxSel0 (Out)
|
||||||
|
8 11 IOPort MuxedQCount 0 MuxQ-A (In)
|
||||||
|
9 12 IOPort MuxedQCount 0 MuxQ-B (In)
|
||||||
|
10 13 IOPort MuxedQCount 0 MuxQ-IDX (In)
|
||||||
|
11 14 IOPort MuxedQCount 1 MuxQ-A (In)
|
||||||
|
12 15 IOPort MuxedQCount 1 MuxQ-B (In)
|
||||||
|
13 16 IOPort MuxedQCount 1 MuxQ-IDX (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort SSerial 1 RXData4 (In)
|
||||||
|
14 18 IOPort SSerial 1 TXData4 (Out)
|
||||||
|
2 19 IOPort SSerial 1 RXData3 (In)
|
||||||
|
15 20 IOPort SSerial 1 TXData3 (Out)
|
||||||
|
3 21 IOPort SSerial 1 RXData2 (In)
|
||||||
|
16 22 IOPort SSerial 1 TXData2 (Out)
|
||||||
|
4 23 IOPort SSerial 1 RXData1 (In)
|
||||||
|
17 24 IOPort SSerial 1 TXData1 (Out)
|
||||||
|
5 25 IOPort SSerial 1 RXData0 (In)
|
||||||
|
6 26 IOPort SSerial 1 TXData0 (Out)
|
||||||
|
7 27 IOPort MuxedQCountSel 4 MuxSel0 (Out)
|
||||||
|
8 28 IOPort MuxedQCount 2 MuxQ-A (In)
|
||||||
|
9 29 IOPort MuxedQCount 2 MuxQ-B (In)
|
||||||
|
10 30 IOPort MuxedQCount 2 MuxQ-IDX (In)
|
||||||
|
11 31 IOPort MuxedQCount 3 MuxQ-A (In)
|
||||||
|
12 32 IOPort MuxedQCount 3 MuxQ-B (In)
|
||||||
|
13 33 IOPort MuxedQCount 3 MuxQ-IDX (In)
|
||||||
|
|
||||||
BIN
7i92t_benezan_5abobd.bin
Normal file
BIN
7i92t_benezan_5abobd.bin
Normal file
Binary file not shown.
126
7i92t_benezan_5abobd.pin
Normal file
126
7i92t_benezan_5abobd.pin
Normal file
@@ -0,0 +1,126 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 175.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: QCount
|
||||||
|
There are 1 of QCount in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 9 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: PWM
|
||||||
|
There are 2 of PWM in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 4100
|
||||||
|
ClockFrequency: 175.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort None
|
||||||
|
14 1 IOPort None
|
||||||
|
2 2 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
15 3 IOPort None
|
||||||
|
3 4 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
16 5 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
4 6 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
17 7 IOPort PWM 0 PWM (Out)
|
||||||
|
5 8 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
6 9 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
7 10 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
8 11 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
9 12 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
10 13 IOPort None
|
||||||
|
11 14 IOPort None
|
||||||
|
12 15 IOPort None
|
||||||
|
13 16 IOPort None
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort PWM 1 PWM (Out)
|
||||||
|
14 18 IOPort None
|
||||||
|
2 19 IOPort StepGen 5 Step/Table1 (Out)
|
||||||
|
15 20 IOPort None
|
||||||
|
3 21 IOPort StepGen 5 Dir/Table2 (Out)
|
||||||
|
16 22 IOPort None
|
||||||
|
4 23 IOPort StepGen 6 Step/Table1 (Out)
|
||||||
|
17 24 IOPort None
|
||||||
|
5 25 IOPort StepGen 6 Dir/Table2 (Out)
|
||||||
|
6 26 IOPort StepGen 7 Step/Table1 (Out)
|
||||||
|
7 27 IOPort StepGen 7 Dir/Table2 (Out)
|
||||||
|
8 28 IOPort StepGen 8 Step/Table1 (Out)
|
||||||
|
9 29 IOPort StepGen 8 Dir/Table2 (Out)
|
||||||
|
10 30 IOPort None
|
||||||
|
11 31 IOPort QCount 0 Quad-A (In)
|
||||||
|
12 32 IOPort QCount 0 Quad-B (In)
|
||||||
|
13 33 IOPort QCount 0 Quad-IDX (In)
|
||||||
|
|
||||||
BIN
7i92t_benezanx2d.bin
Normal file
BIN
7i92t_benezanx2d.bin
Normal file
Binary file not shown.
126
7i92t_benezanx2d.pin
Normal file
126
7i92t_benezanx2d.pin
Normal file
@@ -0,0 +1,126 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 175.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: QCount
|
||||||
|
There are 2 of QCount in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 10 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: PWM
|
||||||
|
There are 2 of PWM in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 4100
|
||||||
|
ClockFrequency: 175.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort None
|
||||||
|
14 1 IOPort None
|
||||||
|
2 2 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
15 3 IOPort None
|
||||||
|
3 4 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
16 5 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
4 6 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
17 7 IOPort PWM 0 PWM (Out)
|
||||||
|
5 8 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
6 9 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
7 10 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
8 11 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
9 12 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
10 13 IOPort None
|
||||||
|
11 14 IOPort QCount 0 Quad-A (In)
|
||||||
|
12 15 IOPort QCount 0 Quad-B (In)
|
||||||
|
13 16 IOPort QCount 0 Quad-IDX (In)
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort PWM 1 PWM (Out)
|
||||||
|
14 18 IOPort None
|
||||||
|
2 19 IOPort StepGen 5 Dir/Table2 (Out)
|
||||||
|
15 20 IOPort None
|
||||||
|
3 21 IOPort StepGen 5 Step/Table1 (Out)
|
||||||
|
16 22 IOPort StepGen 9 Step/Table1 (Out)
|
||||||
|
4 23 IOPort StepGen 6 Dir/Table2 (Out)
|
||||||
|
17 24 IOPort PWM 1 PWM (Out)
|
||||||
|
5 25 IOPort StepGen 6 Step/Table1 (Out)
|
||||||
|
6 26 IOPort StepGen 7 Dir/Table2 (Out)
|
||||||
|
7 27 IOPort StepGen 7 Step/Table1 (Out)
|
||||||
|
8 28 IOPort StepGen 8 Dir/Table2 (Out)
|
||||||
|
9 29 IOPort StepGen 8 Step/Table1 (Out)
|
||||||
|
10 30 IOPort None
|
||||||
|
11 31 IOPort QCount 1 Quad-A (In)
|
||||||
|
12 32 IOPort QCount 1 Quad-B (In)
|
||||||
|
13 33 IOPort QCount 1 Quad-IDX (In)
|
||||||
|
|
||||||
BIN
7i92t_g540_7i76d.bin
Normal file
BIN
7i92t_g540_7i76d.bin
Normal file
Binary file not shown.
135
7i92t_g540_7i76d.pin
Normal file
135
7i92t_g540_7i76d.pin
Normal file
@@ -0,0 +1,135 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 175.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: PWM
|
||||||
|
There are 1 of PWM in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 4100
|
||||||
|
ClockFrequency: 175.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: QCount
|
||||||
|
There are 2 of QCount in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: SSerial
|
||||||
|
There are 1 of SSerial in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 6
|
||||||
|
BaseAddress: 5B00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 64 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 10 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort None
|
||||||
|
14 1 IOPort PWM 0 PWM (Out)
|
||||||
|
2 2 IOPort StepGen 5 Step/Table1 (Out)
|
||||||
|
15 3 IOPort None
|
||||||
|
3 4 IOPort StepGen 5 Dir/Table2 (Out)
|
||||||
|
16 5 IOPort StepGen 9 Step/Table1 (Out)
|
||||||
|
4 6 IOPort StepGen 6 Step/Table1 (Out)
|
||||||
|
17 7 IOPort None
|
||||||
|
5 8 IOPort StepGen 6 Dir/Table2 (Out)
|
||||||
|
6 9 IOPort StepGen 7 Step/Table1 (Out)
|
||||||
|
7 10 IOPort StepGen 7 Dir/Table2 (Out)
|
||||||
|
8 11 IOPort StepGen 8 Step/Table1 (Out)
|
||||||
|
9 12 IOPort StepGen 8 Dir/Table2 (Out)
|
||||||
|
10 13 IOPort QCount 1 Quad-A (In)
|
||||||
|
11 14 IOPort QCount 1 Quad-B (In)
|
||||||
|
12 15 IOPort QCount 1 Quad-IDX (In)
|
||||||
|
13 16 IOPort None
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
14 18 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
2 19 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
15 20 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
3 21 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
16 22 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
4 23 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
17 24 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
5 25 IOPort StepGen 4 Dir/Table2 (Out)
|
||||||
|
6 26 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
7 27 IOPort SSerial 0 TXData0 (Out)
|
||||||
|
8 28 IOPort SSerial 0 RXData0 (In)
|
||||||
|
9 29 IOPort SSerial 0 TXData1 (Out)
|
||||||
|
10 30 IOPort SSerial 0 RXData1 (In)
|
||||||
|
11 31 IOPort QCount 0 Quad-IDX (In)
|
||||||
|
12 32 IOPort QCount 0 Quad-B (In)
|
||||||
|
13 33 IOPort QCount 0 Quad-A (In)
|
||||||
|
|
||||||
BIN
7i92t_g540d.bin
Normal file
BIN
7i92t_g540d.bin
Normal file
Binary file not shown.
126
7i92t_g540d.pin
Normal file
126
7i92t_g540d.pin
Normal file
@@ -0,0 +1,126 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 180.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: QCount
|
||||||
|
There are 2 of QCount in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 10 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: PWM
|
||||||
|
There are 2 of PWM in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 4100
|
||||||
|
ClockFrequency: 180.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort None
|
||||||
|
14 1 IOPort PWM 0 PWM (Out)
|
||||||
|
2 2 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
15 3 IOPort None
|
||||||
|
3 4 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
16 5 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
4 6 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
17 7 IOPort None
|
||||||
|
5 8 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
6 9 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
7 10 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
8 11 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
9 12 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
10 13 IOPort QCount 0 Quad-A (In)
|
||||||
|
11 14 IOPort QCount 0 Quad-B (In)
|
||||||
|
12 15 IOPort QCount 0 Quad-IDX (In)
|
||||||
|
13 16 IOPort None
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort None
|
||||||
|
14 18 IOPort PWM 1 PWM (Out)
|
||||||
|
2 19 IOPort StepGen 5 Step/Table1 (Out)
|
||||||
|
15 20 IOPort None
|
||||||
|
3 21 IOPort StepGen 5 Dir/Table2 (Out)
|
||||||
|
16 22 IOPort StepGen 9 Step/Table1 (Out)
|
||||||
|
4 23 IOPort StepGen 6 Step/Table1 (Out)
|
||||||
|
17 24 IOPort None
|
||||||
|
5 25 IOPort StepGen 6 Dir/Table2 (Out)
|
||||||
|
6 26 IOPort StepGen 7 Step/Table1 (Out)
|
||||||
|
7 27 IOPort StepGen 7 Dir/Table2 (Out)
|
||||||
|
8 28 IOPort StepGen 8 Step/Table1 (Out)
|
||||||
|
9 29 IOPort StepGen 8 Dir/Table2 (Out)
|
||||||
|
10 30 IOPort QCount 1 Quad-A (In)
|
||||||
|
11 31 IOPort QCount 1 Quad-B (In)
|
||||||
|
12 32 IOPort QCount 1 Quad-IDX (In)
|
||||||
|
13 33 IOPort None
|
||||||
|
|
||||||
BIN
7i92t_mx3660d.bin
Normal file
BIN
7i92t_mx3660d.bin
Normal file
Binary file not shown.
126
7i92t_mx3660d.pin
Normal file
126
7i92t_mx3660d.pin
Normal file
@@ -0,0 +1,126 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 180.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: QCount
|
||||||
|
There are 2 of QCount in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 8 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: PWM
|
||||||
|
There are 2 of PWM in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 4100
|
||||||
|
ClockFrequency: 180.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort None
|
||||||
|
14 1 IOPort PWM 0 PWM (Out)
|
||||||
|
2 2 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
15 3 IOPort None
|
||||||
|
3 4 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
16 5 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
4 6 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
17 7 IOPort None
|
||||||
|
5 8 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
6 9 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
7 10 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
8 11 IOPort None
|
||||||
|
9 12 IOPort None
|
||||||
|
10 13 IOPort QCount 0 Quad-A (In)
|
||||||
|
11 14 IOPort QCount 0 Quad-B (In)
|
||||||
|
12 15 IOPort QCount 0 Quad-IDX (In)
|
||||||
|
13 16 IOPort None
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort None
|
||||||
|
14 18 IOPort PWM 1 PWM (Out)
|
||||||
|
2 19 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
15 20 IOPort None
|
||||||
|
3 21 IOPort StepGen 4 Dir/Table2 (Out)
|
||||||
|
16 22 IOPort StepGen 7 Step/Table1 (Out)
|
||||||
|
4 23 IOPort StepGen 5 Step/Table1 (Out)
|
||||||
|
17 24 IOPort None
|
||||||
|
5 25 IOPort StepGen 5 Dir/Table2 (Out)
|
||||||
|
6 26 IOPort StepGen 6 Step/Table1 (Out)
|
||||||
|
7 27 IOPort StepGen 6 Dir/Table2 (Out)
|
||||||
|
8 28 IOPort None
|
||||||
|
9 29 IOPort None
|
||||||
|
10 30 IOPort QCount 1 Quad-A (In)
|
||||||
|
11 31 IOPort QCount 1 Quad-B (In)
|
||||||
|
12 32 IOPort QCount 1 Quad-IDX (In)
|
||||||
|
13 33 IOPort None
|
||||||
|
|
||||||
BIN
7i92t_mx4660d.bin
Normal file
BIN
7i92t_mx4660d.bin
Normal file
Binary file not shown.
126
7i92t_mx4660d.pin
Normal file
126
7i92t_mx4660d.pin
Normal file
@@ -0,0 +1,126 @@
|
|||||||
|
Configuration Name: HOSTMOT2
|
||||||
|
|
||||||
|
General configuration information:
|
||||||
|
|
||||||
|
BoardName : MESA7I92
|
||||||
|
FPGA Size: 20 KGates
|
||||||
|
FPGA Pins: 256
|
||||||
|
Number of IO Ports: 2
|
||||||
|
Width of one I/O port: 17
|
||||||
|
Clock Low frequency: 100.0000 MHz
|
||||||
|
Clock High frequency: 180.0000 MHz
|
||||||
|
IDROM Type: 3
|
||||||
|
Instance Stride 0: 4
|
||||||
|
Instance Stride 1: 64
|
||||||
|
Register Stride 0: 256
|
||||||
|
Register Stride 1: 256
|
||||||
|
|
||||||
|
Modules in configuration:
|
||||||
|
|
||||||
|
Module: DPLL
|
||||||
|
There are 1 of DPLL in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 7
|
||||||
|
BaseAddress: 7000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: WatchDog
|
||||||
|
There are 1 of WatchDog in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 3
|
||||||
|
BaseAddress: 0C00
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: IOPort
|
||||||
|
There are 2 of IOPort in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 1000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: QCount
|
||||||
|
There are 2 of QCount in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 3000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: StepGen
|
||||||
|
There are 10 of StepGen in configuration
|
||||||
|
Version: 2
|
||||||
|
Registers: 10
|
||||||
|
BaseAddress: 2000
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: PWM
|
||||||
|
There are 2 of PWM in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 5
|
||||||
|
BaseAddress: 4100
|
||||||
|
ClockFrequency: 180.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Module: LED
|
||||||
|
There are 1 of LED in configuration
|
||||||
|
Version: 0
|
||||||
|
Registers: 1
|
||||||
|
BaseAddress: 0200
|
||||||
|
ClockFrequency: 100.000 MHz
|
||||||
|
Register Stride: 256 bytes
|
||||||
|
Instance Stride: 4 bytes
|
||||||
|
|
||||||
|
Configuration pin-out:
|
||||||
|
|
||||||
|
IO Connections for P2
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 0 IOPort None
|
||||||
|
14 1 IOPort PWM 0 PWM (Out)
|
||||||
|
2 2 IOPort StepGen 0 Step/Table1 (Out)
|
||||||
|
15 3 IOPort None
|
||||||
|
3 4 IOPort StepGen 0 Dir/Table2 (Out)
|
||||||
|
16 5 IOPort StepGen 4 Step/Table1 (Out)
|
||||||
|
4 6 IOPort StepGen 1 Step/Table1 (Out)
|
||||||
|
17 7 IOPort None
|
||||||
|
5 8 IOPort StepGen 1 Dir/Table2 (Out)
|
||||||
|
6 9 IOPort StepGen 2 Step/Table1 (Out)
|
||||||
|
7 10 IOPort StepGen 2 Dir/Table2 (Out)
|
||||||
|
8 11 IOPort StepGen 3 Step/Table1 (Out)
|
||||||
|
9 12 IOPort StepGen 3 Dir/Table2 (Out)
|
||||||
|
10 13 IOPort QCount 0 Quad-A (In)
|
||||||
|
11 14 IOPort QCount 0 Quad-B (In)
|
||||||
|
12 15 IOPort QCount 0 Quad-IDX (In)
|
||||||
|
13 16 IOPort None
|
||||||
|
|
||||||
|
IO Connections for P1
|
||||||
|
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
|
||||||
|
|
||||||
|
1 17 IOPort None
|
||||||
|
14 18 IOPort PWM 1 PWM (Out)
|
||||||
|
2 19 IOPort StepGen 5 Step/Table1 (Out)
|
||||||
|
15 20 IOPort None
|
||||||
|
3 21 IOPort StepGen 5 Dir/Table2 (Out)
|
||||||
|
16 22 IOPort StepGen 9 Step/Table1 (Out)
|
||||||
|
4 23 IOPort StepGen 6 Step/Table1 (Out)
|
||||||
|
17 24 IOPort None
|
||||||
|
5 25 IOPort StepGen 6 Dir/Table2 (Out)
|
||||||
|
6 26 IOPort StepGen 7 Step/Table1 (Out)
|
||||||
|
7 27 IOPort StepGen 7 Dir/Table2 (Out)
|
||||||
|
8 28 IOPort StepGen 8 Step/Table1 (Out)
|
||||||
|
9 29 IOPort StepGen 8 Dir/Table2 (Out)
|
||||||
|
10 30 IOPort QCount 1 Quad-A (In)
|
||||||
|
11 31 IOPort QCount 1 Quad-B (In)
|
||||||
|
12 32 IOPort QCount 1 Quad-IDX (In)
|
||||||
|
13 33 IOPort None
|
||||||
|
|
||||||
1
README
Normal file
1
README
Normal file
@@ -0,0 +1 @@
|
|||||||
|
NEVER write the fallback configuration to anything but the fallback location
|
||||||
1263
firmware_versions.md
Normal file
1263
firmware_versions.md
Normal file
File diff suppressed because it is too large
Load Diff
67
instrukcja_konfiguracji.md
Normal file
67
instrukcja_konfiguracji.md
Normal file
@@ -0,0 +1,67 @@
|
|||||||
|
# Instrukcja Konfiguracji Mesa 7i92T (LPT Breakout Board)
|
||||||
|
|
||||||
|
Niniejszy dokument opisuje proces wyboru odpowiedniej konfiguracji oraz procedurę programowania (flaszowania) karty Mesa 7i92T przy przejściu z tradycyjnego portu LPT (równoległego) na połączenie sieciowe.
|
||||||
|
|
||||||
|
---
|
||||||
|
|
||||||
|
## 1. Wybór odpowiedniego pliku konfiguracyjnego (.bin)
|
||||||
|
|
||||||
|
Wybór pliku zależy od podłączonej płyty breakout (BOB - Breakout Board) do portu LPT (złącza DB25) karty Mesa 7i92T:
|
||||||
|
|
||||||
|
* **Popularna niebieska/zielona chińska płyta 5-osiowa (5-axis Breakout Board)**
|
||||||
|
* **Plik:** `7i92t_5abobx2d.bin`
|
||||||
|
* **Opis:** Najpopularniejsza konfiguracja dla tanich płyt LPT. Piny wejściowe/wyjściowe są skonfigurowane w klasyczny sposób (krok/kierunek na pinach 2-9, wejścia na pinach 10-13 oraz 15, wyjście PWM/przekaźnika na pinach 1, 14, 16, 17).
|
||||||
|
* **Rozpiska pinów:** Zobacz szczegóły w pliku [7i92t_5abobx2d.pin](file:///home/cnc/Documents/7i92t/configs/hostmot2/7i92t_5abobx2d.pin).
|
||||||
|
|
||||||
|
* **Gecko G540**
|
||||||
|
* **Plik:** `7i92t_g540d.bin`
|
||||||
|
* **Opis:** Konfiguracja zoptymalizowana pod kątem zintegrowanego sterownika Gecko G540.
|
||||||
|
* **Rozpiska pinów:** Zobacz szczegóły w pliku [7i92t_g540d.pin](file:///home/cnc/Documents/7i92t/configs/hostmot2/7i92t_g540d.pin).
|
||||||
|
|
||||||
|
* **Leadshine MX3660 / MX4660**
|
||||||
|
* **Plik:** `7i92t_mx3660d.bin` lub `7i92t_mx4660d.bin`
|
||||||
|
|
||||||
|
* **Inne standardowe płyty LPT**
|
||||||
|
* Jeśli używasz innej płyty lub własnego układu pinów, najbardziej uniwersalnym punktem wyjścia jest `7i92t_5abobx2d.bin`.
|
||||||
|
|
||||||
|
---
|
||||||
|
|
||||||
|
## 2. Konfiguracja połączenia sieciowego
|
||||||
|
|
||||||
|
Aby skomunikować się z kartą przez sieć Ethernet:
|
||||||
|
|
||||||
|
1. **Zasilanie karty:** Upewnij się, że karta Mesa 7i92T ma zasilanie (np. przez USB 5V lub dedykowane złącze).
|
||||||
|
2. **Statyczne IP w komputerze:** Skonfiguruj kartę sieciową komputera do pracy w tej samej podsieci co Mesa.
|
||||||
|
* **Domyślny adres IP karty Mesa 7i92T:** `192.168.1.121` (przy zworki **W5** w pozycji górnej/ON).
|
||||||
|
* **IP komputera:** Np. `192.168.1.10`
|
||||||
|
* **Maska podsieci:** `255.255.255.0`
|
||||||
|
3. **Test połączenia:** Sprawdź poprawność komunikacji za pomocą narzędzia `mesaflash`:
|
||||||
|
```bash
|
||||||
|
mesaflash --device 7i92t --addr 192.168.1.121 --readhmid
|
||||||
|
```
|
||||||
|
Jeśli komenda wyświetli rozkład pinów, połączenie działa prawidłowo.
|
||||||
|
|
||||||
|
---
|
||||||
|
|
||||||
|
## 3. Procedura wgrywania (flaszowania) konfiguracji
|
||||||
|
|
||||||
|
> [!WARNING]
|
||||||
|
> Nigdy nie zapisuj konfiguracji do pamięci zapasowej (`--fallback`) jeśli nie ma takiej wyraźnej potrzeby. Używaj standardowego zapisu do obszaru użytkownika (`user area`). W razie błędu, zawsze będziesz mógł uruchomić kartę z pamięci zapasowej za pomocą odpowiedniej zworki.
|
||||||
|
|
||||||
|
### Krok 1: Wgranie pliku binarniego
|
||||||
|
Wgraj wybrany plik konfiguracyjny (np. `7i92t_5abobx2d.bin`) do pamięci karty:
|
||||||
|
```bash
|
||||||
|
mesaflash --device 7i92t --addr 192.168.1.121 --write 7i92t_5abobx2d.bin
|
||||||
|
```
|
||||||
|
|
||||||
|
### Krok 2: Weryfikacja zapisu
|
||||||
|
Upewnij się, że plik zapisał się poprawnie (porównanie sumy kontrolnej):
|
||||||
|
```bash
|
||||||
|
mesaflash --device 7i92t --addr 192.168.1.121 --verify 7i92t_5abobx2d.bin
|
||||||
|
```
|
||||||
|
|
||||||
|
### Krok 3: Przeładowanie karty
|
||||||
|
Zresetuj kartę Mesa, aby zaczęła działać z nowo wgraną konfiguracją:
|
||||||
|
```bash
|
||||||
|
mesaflash --device 7i92t --addr 192.168.1.121 --reload
|
||||||
|
```
|
||||||
94
instrukcja_wlasny_firmware.md
Normal file
94
instrukcja_wlasny_firmware.md
Normal file
@@ -0,0 +1,94 @@
|
|||||||
|
# Tworzenie Własnego Firmware dla Mesa 7i92TF (Efinix Trion T20)
|
||||||
|
|
||||||
|
Karta **Mesa 7i92TF** (wersja z żeńskim portem DB25 oraz złączem IDC26 2x13) jest oparta na układzie FPGA **Efinix Trion T20F256**. Oznacza to, że do edycji i kompilacji oprogramowania układowego wykorzystuje się środowisko **Efinity IDE** firmy Efinix, a sam kod opisany jest w języku VHDL (architektura HostMot2).
|
||||||
|
|
||||||
|
Poniżej znajduje się kompletny przewodnik krok po kroku, jak przygotować i skompilować własną konfigurację pinów.
|
||||||
|
|
||||||
|
---
|
||||||
|
|
||||||
|
## Krok 1: Instalacja Efinity IDE
|
||||||
|
1. Zarejestruj się na stronie producenta układu FPGA: [Efinix Inc.](https://www.efinixinc.com/).
|
||||||
|
2. Pobierz i zainstaluj oprogramowanie **Efinity IDE** (zalecana wersja to `2021.2` lub nowsza, zgodnie z konfiguracją projektu w pliku `.xml`).
|
||||||
|
3. Pobierz plik licencji Efinix (jest wymagany do działania kompilatora).
|
||||||
|
|
||||||
|
---
|
||||||
|
|
||||||
|
## Krok 2: Przygotowanie plików źródłowych
|
||||||
|
W Twoim katalogu ze źródłami (`source/`) znajduje się spakowany projekt dla tego układu:
|
||||||
|
1. Rozpakuj plik **`7i92t-hm2.zip`** (zawierający projekt dla układu T20F256) do nowego folderu roboczego, np.:
|
||||||
|
```bash
|
||||||
|
unzip 7i92t-hm2.zip -d 7i92t_workspace
|
||||||
|
```
|
||||||
|
2. Przejdź do nowo utworzonego folderu.
|
||||||
|
|
||||||
|
---
|
||||||
|
|
||||||
|
## Krok 3: Stworzenie nowej konfiguracji pinów (VHDL)
|
||||||
|
Rozkład pinów dla złącz na karcie Mesa 7i92TF jest zdefiniowany w plikach o nazwie `PIN_*.vhd`.
|
||||||
|
* **P2 (DB25 Female):** Piny wejścia/wyjścia od `I/O 00` do `I/O 16`.
|
||||||
|
* **P1 (IDC26 2x13):** Piny wejścia/wyjścia od `I/O 17` do `I/O 33`.
|
||||||
|
|
||||||
|
### Instrukcja tworzenia własnego pliku pinów:
|
||||||
|
1. Skopiuj istniejący plik (np. popularny standard 5-osiowy `PIN_5ABOBx2D_34.vhd`) na nową nazwę:
|
||||||
|
```bash
|
||||||
|
cp PIN_5ABOBx2D_34.vhd PIN_MOJA_KONFIGURACJA_34.vhd
|
||||||
|
```
|
||||||
|
2. Otwórz plik `PIN_MOJA_KONFIGURACJA_34.vhd` w edytorze tekstu.
|
||||||
|
3. Zmień nazwę pakietu (package) w nagłówku i stopce pliku:
|
||||||
|
```vhdl
|
||||||
|
package PIN_MOJA_KONFIGURACJA_34 is
|
||||||
|
...
|
||||||
|
end PIN_MOJA_KONFIGURACJA_34;
|
||||||
|
```
|
||||||
|
4. **Zdefiniuj moduły sprzętowe (`ModuleID`):**
|
||||||
|
W sekcji `constant ModuleID` określasz, ile maksymalnie sprzętowych modułów (StepGen, QCount, PWM) ma być aktywnych w strukturze FPGA.
|
||||||
|
5. **Przypisz piny do funkcji (`PinDesc`):**
|
||||||
|
W sekcji `constant PinDesc` przypisujesz fizycznym pinom `I/O` odpowiednie funkcje.
|
||||||
|
* Przypisanie jako StepGen (krok): `IOPortTag & x"00" & StepGenTag & StepGenStepPin`
|
||||||
|
* Przypisanie jako StepGen (kierunek): `IOPortTag & x"00" & StepGenTag & StepGenDirPin`
|
||||||
|
* Przypisanie jako standardowe wejście/wyjście (GPIO): `IOPortTag & x"00" & NullTag & NullPin`
|
||||||
|
* *Uwaga:* Druga kolumna bajtowa (np. `x"00"`, `x"01"`) określa numer instancji danego modułu (np. StepGen 0, StepGen 1...).
|
||||||
|
|
||||||
|
---
|
||||||
|
|
||||||
|
## Krok 4: Podłączenie konfiguracji w projekcie
|
||||||
|
Musisz poinstruować plik główny (Top-level), aby użył Twojej nowej konfiguracji:
|
||||||
|
1. Otwórz plik **`TopEthernet16HostMot2_efx.vhd`**.
|
||||||
|
2. Odszukaj listę klauzul `use work.PIN_...`.
|
||||||
|
3. Zakomentuj obecnie aktywną linię (wstawiając `--` na początku), np.:
|
||||||
|
```vhdl
|
||||||
|
--use work.PIN_PBXMAXD_34.all;
|
||||||
|
```
|
||||||
|
4. Dodaj i odkomentuj swoją konfigurację:
|
||||||
|
```vhdl
|
||||||
|
use work.PIN_MOJA_KONFIGURACJA_34.all;
|
||||||
|
```
|
||||||
|
|
||||||
|
---
|
||||||
|
|
||||||
|
## Krok 5: Kompilacja w Efinity IDE
|
||||||
|
1. Uruchom program **Efinity IDE**.
|
||||||
|
2. Otwórz projekt, wybierając plik **`seveni92t.xml`** z folderu roboczego.
|
||||||
|
3. Dodaj swój nowy plik `PIN_MOJA_KONFIGURACJA_34.vhd` do listy plików projektu w zakładce *Design* (jeśli nie został automatycznie dodany).
|
||||||
|
4. Kliknij przycisk **Generate Bitstream** (ikona odtwarzania/zielona strzałka).
|
||||||
|
5. Środowisko przeprowadzi syntezę, placement i routing.
|
||||||
|
6. Po pomyślnej kompilacji, gotowy plik wyjściowy `.bin` znajdziesz w podkatalogu **`outflow/`** (np. `seveni92t.bin`).
|
||||||
|
|
||||||
|
---
|
||||||
|
|
||||||
|
## Krok 6: Wgranie nowego firmware na kartę
|
||||||
|
Gdy masz już skompilowany plik `.bin`, wgraj go za pomocą programu `mesaflash`:
|
||||||
|
|
||||||
|
1. **Zapisz firmware do pamięci użytkownika:**
|
||||||
|
```bash
|
||||||
|
mesaflash --device 7i92t --addr 192.168.1.121 --write outflow/seveni92t.bin
|
||||||
|
```
|
||||||
|
2. **Zweryfikuj poprawność zapisu:**
|
||||||
|
```bash
|
||||||
|
mesaflash --device 7i92t --addr 192.168.1.121 --verify outflow/seveni92t.bin
|
||||||
|
```
|
||||||
|
3. **Załaduj nowy firmware (reset karty):**
|
||||||
|
```bash
|
||||||
|
mesaflash --device 7i92t --addr 192.168.1.121 --reload
|
||||||
|
```
|
||||||
|
*Po przeładowaniu karta zacznie działać z Twoją własną konfiguracją pinów.*
|
||||||
BIN
source/7i92t-hm2.zip
Normal file
BIN
source/7i92t-hm2.zip
Normal file
Binary file not shown.
BIN
source/7i92t25-hm2.zip
Normal file
BIN
source/7i92t25-hm2.zip
Normal file
Binary file not shown.
BIN
source/efinehm2.zip
Normal file
BIN
source/efinehm2.zip
Normal file
Binary file not shown.
Reference in New Issue
Block a user