init
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126
7i92t_7i76_7i74d.pin
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126
7i92t_7i76_7i74d.pin
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Configuration Name: HOSTMOT2
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General configuration information:
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BoardName : MESA7I92
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FPGA Size: 20 KGates
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FPGA Pins: 256
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Number of IO Ports: 2
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Width of one I/O port: 17
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Clock Low frequency: 100.0000 MHz
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Clock High frequency: 180.0000 MHz
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IDROM Type: 3
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Instance Stride 0: 4
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Instance Stride 1: 64
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Register Stride 0: 256
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Register Stride 1: 256
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Modules in configuration:
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Module: DPLL
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There are 1 of DPLL in configuration
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Version: 0
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Registers: 7
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BaseAddress: 7000
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 4 bytes
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Module: WatchDog
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There are 1 of WatchDog in configuration
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Version: 0
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Registers: 3
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BaseAddress: 0C00
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 4 bytes
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Module: IOPort
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There are 2 of IOPort in configuration
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Version: 0
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Registers: 5
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BaseAddress: 1000
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 4 bytes
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Module: QCount
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There are 1 of QCount in configuration
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Version: 2
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Registers: 5
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BaseAddress: 3000
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 4 bytes
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Module: SSerial
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There are 2 of SSerial in configuration
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Version: 0
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Registers: 6
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BaseAddress: 5B00
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 64 bytes
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Module: StepGen
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There are 5 of StepGen in configuration
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Version: 2
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Registers: 10
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BaseAddress: 2000
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 4 bytes
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Module: LED
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There are 1 of LED in configuration
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Version: 0
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Registers: 1
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BaseAddress: 0200
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ClockFrequency: 100.000 MHz
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Register Stride: 256 bytes
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Instance Stride: 4 bytes
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Configuration pin-out:
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IO Connections for P2
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DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
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1 0 IOPort StepGen 0 Dir/Table2 (Out)
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14 1 IOPort StepGen 0 Step/Table1 (Out)
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2 2 IOPort StepGen 1 Dir/Table2 (Out)
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15 3 IOPort StepGen 1 Step/Table1 (Out)
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3 4 IOPort StepGen 2 Dir/Table2 (Out)
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16 5 IOPort StepGen 2 Step/Table1 (Out)
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4 6 IOPort StepGen 3 Dir/Table2 (Out)
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17 7 IOPort StepGen 3 Step/Table1 (Out)
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5 8 IOPort StepGen 4 Dir/Table2 (Out)
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6 9 IOPort StepGen 4 Step/Table1 (Out)
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7 10 IOPort SSerial 0 TXData0 (Out)
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8 11 IOPort SSerial 0 RXData0 (In)
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9 12 IOPort SSerial 0 TXData1 (Out)
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10 13 IOPort SSerial 0 RXData1 (In)
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11 14 IOPort QCount 0 Quad-IDX (In)
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12 15 IOPort QCount 0 Quad-B (In)
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13 16 IOPort QCount 0 Quad-A (In)
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IO Connections for P1
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DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
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1 17 IOPort SSerial 1 RXData0 (In)
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14 18 IOPort SSerial 1 RXData1 (In)
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2 19 IOPort SSerial 1 RXData2 (In)
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15 20 IOPort SSerial 1 RXData3 (In)
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3 21 IOPort SSerial 1 TXData0 (Out)
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16 22 IOPort SSerial 1 TXData1 (Out)
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4 23 IOPort SSerial 1 TXData2 (Out)
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17 24 IOPort SSerial 1 TXData3 (Out)
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5 25 IOPort SSerial 1 RXData4 (In)
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6 26 IOPort SSerial 1 RXData5 (In)
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7 27 IOPort SSerial 1 RXData6 (In)
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8 28 IOPort SSerial 1 RXData7 (In)
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9 29 IOPort SSerial 1 TXData4 (Out)
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10 30 IOPort SSerial 1 TXData5 (Out)
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11 31 IOPort SSerial 1 TXData6 (Out)
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12 32 IOPort SSerial 1 TXData7 (Out)
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13 33 IOPort SSerial 1 TXEn7 (Out)
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