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initialize ad9833 and mcp41

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bartool
2023-05-21 21:09:07 +02:00
parent 26f5cfe3ce
commit 40e0ca1d0c
15 changed files with 237 additions and 178 deletions
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43
firmware/shared_libs/controllers/ctrl_generator.c
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@@ -2,7 +2,6 @@
#include "spi.h"
#include "i2c.h"
#include "ctrl_app_types.h"
#include "ctrl_app.h"
#include "ad9833.h"
#include "ltc2631.h"
#include "mcp41x.h"
@@ -47,35 +46,35 @@ PWM_handle_t pwm_gen[PWM_CHAN_MAX];
uint8_t ch_to_gen_ch[CHANNEL_MAX] = {FG_CHAN1, FG_CHAN2, FG_CHAN3, PWM_CHAN1, PWM_CHAN2, PWM_CHAN3};
#define DDS1_CS_PORT GPIOC
#define DDS2_CS_PORT GPIOC
#define DDS3_CS_PORT GPIOC
// #define DDS1_CS_PORT GPIOC
// #define DDS2_CS_PORT GPIOC
// #define DDS3_CS_PORT GPIOC
#define DDS1_CS_PIN GPIO_PIN_0
#define DDS2_CS_PIN GPIO_PIN_0
#define DDS3_CS_PIN GPIO_PIN_0
// #define DDS1_CS_PIN GPIO_PIN_0
// #define DDS2_CS_PIN GPIO_PIN_0
// #define DDS3_CS_PIN GPIO_PIN_0
#define AMP1_CS_PORT GPIOC
#define AMP2_CS_PORT GPIOC
#define AMP3_CS_PORT GPIOC
// #define AMP1_CS_PORT GPIOC
// #define AMP2_CS_PORT GPIOC
// #define AMP3_CS_PORT GPIOC
#define AMP1_CS_PIN GPIO_PIN_0
#define AMP2_CS_PIN GPIO_PIN_0
#define AMP3_CS_PIN GPIO_PIN_0
// #define AMP1_CS_PIN GPIO_PIN_0
// #define AMP2_CS_PIN GPIO_PIN_0
// #define AMP3_CS_PIN GPIO_PIN_0
void gen_init()
{
ad9833_init(&dds_gen[FG_CHAN1].hdds, &hspi2, DDS1_CS_PORT, DDS1_CS_PIN);
ad9833_init(&dds_gen[FG_CHAN2].hdds, &hspi2, DDS2_CS_PORT, DDS2_CS_PIN);
ad9833_init(&dds_gen[FG_CHAN3].hdds, &hspi2, DDS3_CS_PORT, DDS3_CS_PIN);
ad9833_init(&dds_gen[FG_CHAN1].hdds, &hspi2, DDS1_CS_GPIO_Port, DDS1_CS_Pin);
// ad9833_init(&dds_gen[FG_CHAN2].hdds, &hspi2, DDS2_CS_PORT, DDS2_CS_PIN);
// ad9833_init(&dds_gen[FG_CHAN3].hdds, &hspi2, DDS3_CS_PORT, DDS3_CS_PIN);
ltc2631_init(&dds_gen[FG_CHAN1].hoffs, &hi2c1, 0x00, LTC2631_8BIT, LTC_REF_2V5);
ltc2631_init(&dds_gen[FG_CHAN2].hoffs, &hi2c1, 0x01, LTC2631_8BIT, LTC_REF_2V5);
ltc2631_init(&dds_gen[FG_CHAN3].hoffs, &hi2c1, 0x02, LTC2631_8BIT, LTC_REF_2V5);
// ltc2631_init(&dds_gen[FG_CHAN1].hoffs, &hi2c1, 0x00, LTC2631_8BIT, LTC_REF_2V5);
// ltc2631_init(&dds_gen[FG_CHAN2].hoffs, &hi2c1, 0x01, LTC2631_8BIT, LTC_REF_2V5);
// ltc2631_init(&dds_gen[FG_CHAN3].hoffs, &hi2c1, 0x02, LTC2631_8BIT, LTC_REF_2V5);
mcp41x_init(&dds_gen[FG_CHAN1].hampl, &hspi2, AMP1_CS_PORT, AMP1_CS_PIN, MCP41X_10K);
mcp41x_init(&dds_gen[FG_CHAN1].hampl, &hspi2, AMP2_CS_PORT, AMP2_CS_PIN, MCP41X_10K);
mcp41x_init(&dds_gen[FG_CHAN1].hampl, &hspi2, AMP3_CS_PORT, AMP3_CS_PIN, MCP41X_10K);
mcp41x_init(&dds_gen[FG_CHAN1].hampl, &hspi2, AMP1_CS_GPIO_Port, AMP1_CS_Pin, MCP41X_10K);
// mcp41x_init(&dds_gen[FG_CHAN1].hampl, &hspi2, AMP2_CS_PORT, AMP2_CS_PIN, MCP41X_10K);
// mcp41x_init(&dds_gen[FG_CHAN1].hampl, &hspi2, AMP3_CS_PORT, AMP3_CS_PIN, MCP41X_10K);
}
static void _setAmpliude(mcp41x_handle_t *hampl, uint16_t ampl_x100)