[refactor] prepare for link gen

This commit is contained in:
2023-08-15 16:18:48 +02:00
parent 76ba24e527
commit 3e7c5c5089
30 changed files with 1387 additions and 1076 deletions

View File

@@ -9,12 +9,14 @@
void ad9833_spi_activate(ad9833_handle_t *hfg)
{
HAL_GPIO_WritePin(hfg->cs_port, hfg->cs_pin, GPIO_PIN_RESET);
// HAL_GPIO_WritePin(hfg->cs_port, hfg->cs_pin, GPIO_PIN_RESET);
hfg->hcs->cs_on(hfg->hcs);
}
void ad9833_spi_deactivate(ad9833_handle_t *hfg)
{
HAL_GPIO_WritePin(hfg->cs_port, hfg->cs_pin, GPIO_PIN_SET);
// HAL_GPIO_WritePin(hfg->cs_port, hfg->cs_pin, GPIO_PIN_SET);
hfg->hcs->cs_off(hfg->hcs);
}
static void ad9833_transmit16(ad9833_handle_t *hfg, uint16_t data)
@@ -41,16 +43,15 @@ void ad9833_reset(ad9833_handle_t *hfg, uint8_t hold)
}
}
void ad9833_init(ad9833_handle_t *hfg, SPI_HandleTypeDef *hspi, GPIO_TypeDef *cs_port, uint16_t cs_pin)
void ad9833_init(ad9833_handle_t *hfg, SPI_HandleTypeDef *hspi, cs_handle_t *hcs)
// Initialise the AD9833 and then set up safe values for the AD9833 device
// Procedure from Figure 27 of in the AD9833 Data Sheet
{
// initialise our preferred CS pin (could be same as SS)
hfg->hspi = hspi;
hfg->cs_port = cs_port;
hfg->cs_pin = cs_pin;
hfg->hcs = hcs;
HAL_GPIO_WritePin(hfg->cs_port, hfg->cs_pin, GPIO_PIN_SET);
hfg->hcs->cs_off(hfg->hcs);
hfg->_regCtl = 0;
hfg->_regCtl |= (1 << AD_B28); // always write 2 words consecutively for frequency
@@ -181,8 +182,6 @@ void ad9833_setFrequency(ad9833_handle_t *hfg, AD_channel_t chan, uint32_t freq)
// PRINT("\nsetFreq CHAN_", chan);
uint16_t freq_channel = 0;
hfg->_freq[chan] = freq;
hfg->_regFreq[chan] = ad9833_calcFreq_uint(freq);
// select the address mask
@@ -215,7 +214,6 @@ void ad9833_setPhase(ad9833_handle_t *hfg, AD_channel_t chan, uint16_t phase)
// PRINT("\nsetPhase CHAN_", chan);
uint16_t phase_channel = 0;
hfg->_phase[chan] = phase;
hfg->_regPhase[chan] = ad9833_calcPhase_uint(phase);
// select the address mask

View File

@@ -1,5 +1,7 @@
#pragma once
#include "spi_cs_if.h"
#define AD_DEFAULT_FREQ 1000U ///< Default initialisation frequency (Hz)
#define AD_DEFAULT_PHASE 0 ///< Default initialisation phase angle (degrees)
#define AD_MCLK 25000000U ///< Clock speed of the AD9833 reference clock in Hz
@@ -37,16 +39,13 @@ typedef struct
uint32_t _regFreq[2]; // frequency registers
uint32_t _regPhase[2]; // phase registers
AD_mode_t _mode; // last set mode
float _freq[2]; // last frequencies set
uint16_t _phase[2]; // last phase setting
AD_mode_t _mode; // last set mode
SPI_HandleTypeDef *hspi;
GPIO_TypeDef *cs_port;
uint16_t cs_pin;
cs_handle_t *hcs;
} ad9833_handle_t;
void ad9833_init(ad9833_handle_t *hfg, SPI_HandleTypeDef *hspi, GPIO_TypeDef *cs_port, uint16_t cs_pin);
void ad9833_init(ad9833_handle_t *hfg, SPI_HandleTypeDef *hspi, cs_handle_t *hcs);
void ad9833_spi_activate(ad9833_handle_t *hfg);
void ad9833_spi_deactivate(ad9833_handle_t *hfg);
void ad9833_reset(ad9833_handle_t *hfg, uint8_t hold);